Difference between revisions of "SGX543"

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<source lang="asm">
 
<source lang="asm">
 
dot.f32
 
dot.f32
−
p0 dot.f32
 
−
!p0 dot.f32
 
−
Pn dot.f32
 
−
 
 
mov.f32
 
mov.f32
−
p0 mov.f32
 
−
!p0 mov.f32
 
−
Pn mov.f32
 
−
 
 
rsq.f32
 
rsq.f32
−
p0 rsq.f32
 
−
!p0 rsq.f32
 
−
Pn rsq.f32
 
−
 
 
rcp.f32
 
rcp.f32
−
p0 rcp.f32
 
−
!p0 rcp.f32
 
−
Pn rcp.f32
 
−
 
 
exp.f32
 
exp.f32
−
p0 exp.f32
 
−
!p0 exp.f32
 
−
Pn exp.f32
 
−
 
 
log.f32
 
log.f32
−
p0 log.f32
 
−
!p0 log.f32
 
−
Pn log.f32
 
  
 
dot.f16
 
dot.f16
−
p0 dot.f16
 
−
!p0 dot.f16
 
−
Pn dot.f16
 
−
 
 
mov.f16
 
mov.f16
−
p0 mov.f16
 
−
!p0 mov.f16
 
−
Pn mov.f16
 
−
 
 
rsq.f16
 
rsq.f16
−
p0 rsq.f16
 
−
!p0 rsq.f16
 
−
Pn rsq.f16
 
−
 
 
rcp.f16
 
rcp.f16
−
p0 rcp.f16
 
−
!p0 rcp.f16
 
−
Pn rcp.f16
 
−
 
 
exp.f16
 
exp.f16
−
p0 exp.f16
 
−
!p0 exp.f16
 
−
Pn exp.f16
 
−
 
 
log.f16
 
log.f16
−
p0 log.f16
 
−
!p0 log.f16
 
−
Pn log.f16
 
 
</source>
 
</source>
  

Revision as of 22:36, 9 February 2018

Instruction set

It looks like instructions are 8 bytes long. Roughly speaking - first 4 bytes contain opcode and addressing mode. Second 4 bytes contain operands encoding.

Bit encoding used in this reference:

value meaning
0 bit clear
1 bit set
x dont care
? unknown

Predicates:

Not sure about predicates yet, but they are used to mask execution of certain instructions.

Notation is the following: 

<predicate> <instruction>

For example: 

!p0 mad.f32

To reduce amount of examples - they are not listed with predicates.

It is assumed that all predicates are applicable to all instructions in the group unless opposite is indicated.

0x00000000 - 0x08000000

Instructions: mad

Encoding:

7 6 5 4 3 2 1 0
opcode1 data_format predicate
0 0 0 0 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

data_format:

2 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

Examples: 

mad.f32
 
mad.f16

0x08000000 - 0x10000000

Instructions: mul.f32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 0 1
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

mul.f32

0x10000000 - 0x18000000

Instructions: mul.f16

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 1 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

mul.f16

0x18000000 - 0x20000000

Instructions: dot.f32, mad.f32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 1 1
7 6 5 4 3 2 1 0
opcode2
x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

opcode2:

5 value
0 dot.f32
1 mad.f32

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

dot.f32

mad.f32

0x20000000 - 0x28000000

Instructions: dot, mov, rsq, rcp, exp, log

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 0 0 x
7 6 5 4 3 2 1 0
op_sel data_format
x x x x x x
7 6 5 4 3 2 1 0
opcode2
x 1 x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

data_format:

5 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

opcode2 (depends on op_sel):

op_sel 6 5 4 value
0 0 0 0 invalid
0 0 0 1 invalid
0 0 1 0 dot
0 0 1 1 invalid
0 1 0 0 invalid
0 1 0 1 mov
0 1 1 0 rsq
0 1 1 1 rcp
op_sel 6 5 4 value
1 0 0 0 invalid
1 0 0 1 invalid
1 0 1 0 invalid
1 0 1 1 invalid
1 1 0 0 exp
1 1 0 1 log
1 1 1 0 invalid
1 1 1 1 invalid

Examples: 

dot.f32
mov.f32
rsq.f32
rcp.f32
exp.f32
log.f32

dot.f16
mov.f16
rsq.f16
rcp.f16
exp.f16
log.f16

0x28000000 - 0x30000000

Instructions: dot, mov, rsq, rcp

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 0 1 x
7 6 5 4 3 2 1 0
data_format
x x x x x x x
7 6 5 4 3 2 1 0
opcode2
x 1 x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

data_format:

5 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

opcode2:

6 5 4 value
0 0 0 invalid
0 0 1 invalid
0 1 0 dot
0 1 1 invalid
1 0 0 invalid
1 0 1 mov
1 1 0 rsq
1 1 1 rcp

Examples: 

dot.f32
p0 dot.f32
!p0 dot.f32
Pn dot.f32

mov.f32
p0 mov.f32
!p0 mov.f32
Pn mov.f32

rsq.f32
p0 rsq.f32
!p0 rsq.f32
Pn rsq.f32

rcp.f32
p0 rcp.f32
!p0 rcp.f32
Pn rcp.f32

dot.f16
p0 dot.f16
!p0 dot.f16
Pn dot.f16

mov.f16
p0 mov.f16
!p0 mov.f16
Pn mov.f16

rsq.f16
p0 rsq.f16
!p0 rsq.f16
Pn rsq.f16

rcp.f16
p0 rcp.f16
!p0 rcp.f16
Pn rcp.f16

0x30000000 - 0x38000000

Instructions: rcp, rsq, log, exp

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 1 0
7 6 5 4 3 2 1 0
data_format
x x x x x x
7 6 5 4 3 2 1 0
opcode2 modifier
x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

opcode2:

2 1 value
0 0 rcp
0 1 rsq
1 0 log
1 1 exp

data_format:

6 5 value
0 0 f32
0 1 f16
1 0 fx10
1 1 invalid

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

modifier (depends on data_format):

data_format 0 value
0 0 0
0 0 1 fx10
data_format 0 value
0 1 0 f32
0 1 1 fx10
data_format 0 value
1 0 0 f32
1 0 1

Examples:

0x38000000 - 0x40000000

7 6 5 4 3 2 1 0
opcode1
0 0 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x40000000 - 0x48000000

7 6 5 4 3 2 1 0
opcode1
0 1 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x48000000 - 0x50000000

7 6 5 4 3 2 1 0
opcode1
0 1 0 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x50000000 - 0x58000000

7 6 5 4 3 2 1 0
opcode1
0 1 0 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x58000000 - 0x60000000

7 6 5 4 3 2 1 0
opcode1
0 1 0 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x60000000 - 0x68000000

7 6 5 4 3 2 1 0
opcode1
0 1 1 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x68000000 - 0x70000000

7 6 5 4 3 2 1 0
opcode1
0 1 1 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x70000000 - 0x78000000

7 6 5 4 3 2 1 0
opcode1
0 1 1 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x78000000 - 0x80000000

7 6 5 4 3 2 1 0
opcode1
0 1 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x80000000 - 0x88000000

7 6 5 4 3 2 1 0
opcode1
1 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x88000000 - 0x90000000

7 6 5 4 3 2 1 0
opcode1
1 0 0 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x90000000 - 0x98000000

7 6 5 4 3 2 1 0
opcode1
1 0 0 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x98000000 - 0xA0000000

7 6 5 4 3 2 1 0
opcode1
1 0 0 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xA0000000 - 0xA8000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xA8000000 - 0xB0000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xB0000000 - 0xB8000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xB8000000 - 0xC0000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xC0000000 - 0xC8000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xC8000000 - 0xD0000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xD0000000 - 0xD8000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xD8000000 - 0xE0000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xE0000000 - 0xE8000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xE8000000 - 0xF0000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xF0000000 - 0xF8000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xF8000000 - 0xFF000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?
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