SGX543: Difference between revisions
Line 3,187: | Line 3,187: | ||
{| class="wikitable" | {| class="wikitable" | ||
|- | |- | ||
! modifier1 !! opcode3 !! 5 !! 4 !! 3 !! value | ! modifier1 !! opcode3 !! opcode4 !! 5 !! 4 !! 3 !! value | ||
|- | |- | ||
| 0 || 0 || 0 || 0 || 0 || ba | | 0 || 0 || @ || 0 || 0 || 0 || ba | ||
|- | |- | ||
| 0 || 1 || 0 || 0 || 0 || mov | | 0 || 1 || @ || 0 || 0 || 0 || mov | ||
|- | |- | ||
| 0 || 0 || 0 || 0 || 1 || mov.f32 | | 0 || 0 || @ || 0 || 0 || 1 || mov.f32 | ||
|- | |- | ||
| 0 || 1 || 0 || 0 || 1 || mov | | 0 || 1 || @ || 0 || 0 || 1 || mov | ||
|- | |- | ||
| 0 || x || 0 || 1 || 0 || mov.f32 | | 0 || x || @ || 0 || 1 || 0 || mov.f32 | ||
|- | |- | ||
| 0 || x || 0 || 1 || 1 || mov.f32 | | 0 || x || @ || 0 || 1 || 1 || mov.f32 | ||
|- | |- | ||
| 0 || x || 1 || 0 || 0 || mov.f32 | | 0 || x || @ || 1 || 0 || 0 || mov.f32 | ||
|- | |- | ||
| 0 || x || 1 || 0 || 1 || mov.f32 | | 0 || x || @ || 1 || 0 || 1 || mov.f32 | ||
|- | |- | ||
| 0 || x || 1 || 1 || 0 || pcoeff, ptoff | | 0 || x || @ || 1 || 1 || 0 || pcoeff, ptoff | ||
|- | |- | ||
| 0 || x || 1 || 1 || 1 || pcoeff, ptoff | | 0 || x || @ || 1 || 1 || 1 || pcoeff, ptoff | ||
|} | |} | ||
Revision as of 21:15, 10 February 2018
Instruction set
It looks like instructions are 8 bytes long. Roughly speaking - first 4 bytes contain opcode and addressing mode. Second 4 bytes contain operands encoding.
Bit encoding used in this reference:
value | meaning |
---|---|
0 | bit clear |
1 | bit set |
x | dont care |
? | unknown |
Predicates:
Not sure about predicates yet, but they are used to mask execution of certain instructions.
Notation is the following:
<predicate> <instruction>
For example:
!p0 mad.f32
To reduce amount of examples - they are not listed with predicates.
It is assumed that all predicates are applicable to all instructions in the group unless opposite is indicated.
Modifier and dest data format:
At the moment it is not known which of the data format fields is dest and which is source.
This is the reason why term modifier is mixed with term dest data format.
0x00000000 - 0x08000000
Instructions: mad
Encoding:
|
|
|
|
Fields:
data_format:
|
predicate:
|
Examples:
mad.f32 mad.f16
0x08000000 - 0x10000000
Instructions: mul.f32
Encoding:
|
|
|
|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | !p0 |
1 | 0 | 1 | !p1 |
1 | 1 | 0 | !p2 |
1 | 1 | 1 | Pn |
Examples:
mul.f32
0x10000000 - 0x18000000
Instructions: mul.f16
Encoding:
|
|
|
|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | !p0 |
1 | 0 | 1 | !p1 |
1 | 1 | 0 | !p2 |
1 | 1 | 1 | Pn |
Examples:
mul.f16
0x18000000 - 0x20000000
Instructions: dot.f32, mad.f32
Encoding:
|
|
|
|
Fields:
opcode2:
|
predicate:
|
Examples:
dot.f32 mad.f32
0x20000000 - 0x28000000
Instructions: dot, mov, rsq, rcp, exp, log
Encoding:
|
|
|
|
Notes:
Having bit 3 in byte 2 set to 0 produces invalid instruction
Fields:
data_format:
|
predicate:
|
opcode2 (depends on op_sel):
|
|
Examples:
dot.f32 mov.f32 rsq.f32 rcp.f32 exp.f32 log.f32 dot.f16 mov.f16 rsq.f16 rcp.f16 exp.f16 log.f16
0x28000000 - 0x30000000
Instructions: dot, mov, rsq, rcp
Encoding:
|
|
|
|
Notes:
Having bit 3 in byte 2 set to 0 produces invalid instruction
Fields:
data_format:
|
predicate:
|
opcode2:
6 | 5 | 4 | value |
---|---|---|---|
0 | 0 | 0 | invalid |
0 | 0 | 1 | invalid |
0 | 1 | 0 | dot |
0 | 1 | 1 | invalid |
1 | 0 | 0 | invalid |
1 | 0 | 1 | mov |
1 | 1 | 0 | rsq |
1 | 1 | 1 | rcp |
Examples:
dot.f32 mov.f32 rsq.f32 rcp.f32 dot.f16 mov.f16 rsq.f16 rcp.f16
0x30000000 - 0x38000000
Instructions: rcp, rsq, log, exp
Encoding:
|
|
|
|
Notes:
modifier
should be omitted if data_format
matches modifier
.
Fields:
opcode2:
|
data_format:
|
modifier:
|
predicate:
|
Examples:
rcp.f32 rsq.f32 log.f32 exp.f32 rcp.f32.fx10 rsq.f32.fx10 log.f32.fx10 exp.f32.fx10 rcp.f16.f32 rsq.f16.f32 log.f16.f32 exp.f16.f32 rcp.f16.fx10 rsq.f16.fx10 log.f16.fx10 exp.f16.fx10 rcp.fx10.f32 rsq.fx10.f32 log.fx10.f32 exp.fx10.f32 rcp.fx10 rsq.fx10 log.fx10 exp.fx10
0x38000000 - 0x40000000
Instructions: mov, cmov, cmov8
Encoding:
|
|
|
|
Notes:
cond
is only applicable to cmov
and cmov8
since this is conditional move.
Fields:
opcode2:
|
cond:
|
data_format:
|
predicate:
|
Examples:
mov.i8 mov.i16 mov.i32 mov.fx10 mov.f16 mov.f32 cmov.eqzero.i8 cmov.eqzero.i16 cmov.eqzero.i32 cmov.eqzero.fx10 cmov.eqzero.f16 cmov.eqzero.f32 cmov8.eqzero.i8 cmov8.eqzero.i16 cmov8.eqzero.i32 cmov8.eqzero.fx10 cmov8.eqzero.f16 cmov8.eqzero.f32 cmov.ltzero.i8 cmov.ltzero.i16 cmov.ltzero.i32 cmov.ltzero.fx10 cmov.ltzero.f16 cmov.ltzero.f32 cmov8.ltzero.i8 cmov8.ltzero.i16 cmov8.ltzero.i32 cmov8.ltzero.fx10 cmov8.ltzero.f16 cmov8.ltzero.f32
0x40000000 - 0x48000000
Instructions: pack, (mov)
Encoding:
|
|
|
|
Notes:
when modifier
matches data_format
it shall be omitted since it has no effect in terms of packing.
furthermore instruction mnemonic shall be replaced to mov
Fields:
data_format:
|
modifier:
|
predicate:
|
Examples:
mov.u8 pack.s16.u8 pack.u8.s8 pack.s16.s8 pack.u8.o8 pack.s16.o8 pack.u8.u16 pack.s16.u16 pack.u8.s16 mov.s16 pack.u8.f16 pack.s16.f16 pack.u8.f32 pack.s16.f32
0x48000000 - 0x50000000
Instructions: this group only contains illegal instructions
Encoding:
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|
0x50000000 - 0x58000000
Instructions: and.u32
Encoding:
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|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | p3 |
1 | 0 | 1 | !p0 |
1 | 1 | 0 | !p1 |
1 | 1 | 1 | Pn |
Examples:
and.u32
0x58000000 - 0x60000000
Instructions: xor.u32
Encoding:
|
|
|
|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | p3 |
1 | 0 | 1 | !p0 |
1 | 1 | 0 | !p1 |
1 | 1 | 1 | Pn |
Examples:
xor.u32
0x60000000 - 0x68000000
Instructions: shl.u32
Encoding:
|
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|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | p3 |
1 | 0 | 1 | !p0 |
1 | 1 | 0 | !p1 |
1 | 1 | 1 | Pn |
Examples:
shl.u32
0x68000000 - 0x70000000
Instructions: shr.u32
Encoding:
|
|
|
|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | p3 |
1 | 0 | 1 | !p0 |
1 | 1 | 0 | !p1 |
1 | 1 | 1 | Pn |
Examples:
shr.u32
0x70000000 - 0x78000000
Instructions: rlp.u32
Encoding:
|
|
|
|
Fields:
predicate:
2 | 1 | 0 | value |
---|---|---|---|
0 | 0 | 0 | |
0 | 0 | 1 | p0 |
0 | 1 | 0 | p1 |
0 | 1 | 1 | p2 |
1 | 0 | 0 | p3 |
1 | 0 | 1 | !p0 |
1 | 1 | 0 | !p1 |
1 | 1 | 1 | Pn |
Examples:
rlp.u32
0x78000000 - 0x80000000
Instructions: this group only contains illegal instructions
Encoding:
|
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|
0x80000000 - 0x88000000
Instructions: add.fx8
Encoding:
|
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|
Fields:
predicate:
2 | 1 | value |
---|---|---|
0 | 0 | |
0 | 1 | p0 |
1 | 0 | p1 |
1 | 1 | !p0 |
Examples:
add.fx8
0x88000000 - 0x90000000
Instructions: add.fx8, sub.fx8
Encoding:
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Notes:
Having bits 2, 3 in byte 2 set to 1 produces invalid instruction
Fields:
opcode2:
|
predicate:
|
Examples:
add.fx8 sub.fx8
0x90000000 - 0x98000000
Instructions: add.fx8, sub.fx8, min.fx8, max.fx8
Encoding:
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Notes:
Having bit 0 in byte 2 set to 1 produces invalid instruction
Fields:
opcode2:
|
predicate:
|
Examples:
add.fx8 sub.fx8 min.fx8 max.fx8
0x98000000 - 0xA0000000
Instructions: mad.u8
Encoding:
|
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Fields:
modifier:
|
predicate:
|
Examples:
mad.u8 mad.sat.u8
0xA0000000 - 0xA8000000
Instructions: mad
Encoding:
|
|
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|
Fields:
data_format:
|
modifier:
|
predicate:
|
Examples:
mad.u16 mad.u16.sat mad.i16 mad.i16.sat
0xA8000000 - 0xB0000000
Instructions: mad
Encoding:
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|
Fields:
data_format:
|
modifier:
|
predicate:
|
Examples:
mad.u32 mad.u32.sat mad.i32 mad.i32.sat
0xB0000000 - 0xB8000000
Instructions: this group only contains illegal instructions
Encoding:
|
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|
0xB8000000 - 0xC0000000
Instructions: this group only contains illegal instructions
Encoding:
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|
0xC0000000 - 0xC8000000
Instructions: this group only contains illegal instructions
Encoding:
|
|
|
|
0xC8000000 - 0xD0000000
Instructions: mad.u8
Encoding:
|
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|
Fields:
modifier:
|
predicate:
|
Examples:
mad.u8 mad.sat.u8
0xD0000000 - 0xD8000000
Instructions: mad
Encoding:
|
|
|
|
Notes:
Having bit 5 in byte 1 set to 1 produces invalid instruction
Fields:
modifier:
|
data_format:
|
predicate:
|
Examples:
mad.u32.s0 mad.i32.s0 mad.u32.s1 mad.i32.s1
0xD8000000 - 0xE0000000
Instructions: this group only contains illegal instructions
Encoding:
|
|
|
|
0xE0000000 - 0xE8000000
Instructions: tex
Encoding:
|
|
|
|
Fields:
dim:
|
func:
|
modifier:
|
data_format:
|
predicate:
|
Examples:
tex1D tex1D.f16 tex1D.f32 tex1D.minp tex1D.minp.f16 tex1D.minp.f32 tex1DBias tex1DBias.f16 tex1DBias.f32 tex1DBias.minp tex1DBias.minp.f16 tex1DBias.minp.f32 tex1DReplace tex1DReplace.f16 tex1DReplace.f32 tex1DReplace.minp tex1DReplace.minp.f16 tex1DReplace.minp.f32 tex1DGrad tex1DGrad.f16 tex1DGrad.f32 tex1DGrad.minp tex1DGrad.minp.f16 tex1DGrad.minp.f32 tex2D tex2D.f16 tex2D.f32 tex2D.minp tex2D.minp.f16 tex2D.minp.f32 tex2DBias tex2DBias.f16 tex2DBias.f32 tex2DBias.minp tex2DBias.minp.f16 tex2DBias.minp.f32 tex2DReplace tex2DReplace.f16 tex2DReplace.f32 tex2DReplace.minp tex2DReplace.minp.f16 tex2DReplace.minp.f32 tex2DGrad tex2DGrad.f16 tex2DGrad.f32 tex2DGrad.minp tex2DGrad.minp.f16 tex2DGrad.minp.f32 texCube texCube.f16 texCube.f32 texCube.minp texCube.minp.f16 texCube.minp.f32 texCubeBias texCubeBias.f16 texCubeBias.f32 texCubeBias.minp texCubeBias.minp.f16 texCubeBias.minp.f32 texCubeReplace texCubeReplace.f16 texCubeReplace.f32 texCubeReplace.minp texCubeReplace.minp.f16 texCubeReplace.minp.f32 texCubeGrad texCubeGrad.f16 texCubeGrad.f32 texCubeGrad.minp texCubeGrad.minp.f16 texCubeGrad.minp.f32
0xE8000000 - 0xF0000000
Instructions: lda32, ldl32, ldt32
Encoding:
|
|
|
|
Notes:
index
is only applicable when fetch
modifier is specified
Fields:
modifier:
|
index:
|
opcode2:
|
predicate:
|
Examples:
lda32 ldl32 ldt32 lda32.fetch1 lda32.fetch2 lda32.fetch3 lda32.fetch4 lda32.fetch5 lda32.fetch6 lda32.fetch7 lda32.fetch8 lda32.fetch9 lda32.fetch10 lda32.fetch11 lda32.fetch12 lda32.fetch13 lda32.fetch14 lda32.fetch15 lda32.fetch16 ldl32.fetch1 ldl32.fetch2 ldl32.fetch3 ldl32.fetch4 ldl32.fetch5 ldl32.fetch6 ldl32.fetch7 ldl32.fetch8 ldl32.fetch9 ldl32.fetch10 ldl32.fetch11 ldl32.fetch12 ldl32.fetch13 ldl32.fetch14 ldl32.fetch15 ldl32.fetch16 ldt32.fetch1 ldt32.fetch2 ldt32.fetch3 ldt32.fetch4 ldt32.fetch5 ldt32.fetch6 ldt32.fetch7 ldt32.fetch8 ldt32.fetch9 ldt32.fetch10 ldt32.fetch11 ldt32.fetch12 ldt32.fetch13 ldt32.fetch14 ldt32.fetch15 ldt32.fetch16
0xF0000000 - 0xF8000000
Instructions: sta32, stl32, stt32
Encoding:
|
|
|
|
Notes:
index
is only applicable when fetch
modifier is specified
Fields:
modifier:
|
index:
|
opcode2:
|
predicate:
|
Examples:
sta32 stl32 stt32 sta32.fetch1 sta32.fetch2 sta32.fetch3 sta32.fetch4 sta32.fetch5 sta32.fetch6 sta32.fetch7 sta32.fetch8 sta32.fetch9 sta32.fetch10 sta32.fetch11 sta32.fetch12 sta32.fetch13 sta32.fetch14 sta32.fetch15 sta32.fetch16 stl32.fetch1 stl32.fetch2 stl32.fetch3 stl32.fetch4 stl32.fetch5 stl32.fetch6 stl32.fetch7 stl32.fetch8 stl32.fetch9 stl32.fetch10 stl32.fetch11 stl32.fetch12 stl32.fetch13 stl32.fetch14 stl32.fetch15 stl32.fetch16 stt32.fetch1 stt32.fetch2 stt32.fetch3 stt32.fetch4 stt32.fetch5 stt32.fetch6 stt32.fetch7 stt32.fetch8 stt32.fetch9 stt32.fetch10 stt32.fetch11 stt32.fetch12 stt32.fetch13 stt32.fetch14 stt32.fetch15 stt32.fetch16
0xF8000000 - 0xFF000000
Instructions:
Encoding:
|
|
|
|
opcode2:
modifier1 | opcode3 | opcode4 | 5 | 4 | 3 | value |
---|---|---|---|---|---|---|
0 | 0 | @ | 0 | 0 | 0 | ba |
0 | 1 | @ | 0 | 0 | 0 | mov |
0 | 0 | @ | 0 | 0 | 1 | mov.f32 |
0 | 1 | @ | 0 | 0 | 1 | mov |
0 | x | @ | 0 | 1 | 0 | mov.f32 |
0 | x | @ | 0 | 1 | 1 | mov.f32 |
0 | x | @ | 1 | 0 | 0 | mov.f32 |
0 | x | @ | 1 | 0 | 1 | mov.f32 |
0 | x | @ | 1 | 1 | 0 | pcoeff, ptoff |
0 | x | @ | 1 | 1 | 1 | pcoeff, ptoff |
modifier1 | 5 | 4 | 3 | value |
---|---|---|---|---|
1 | 0 | 0 | 0 | invalid |
1 | 0 | 0 | 1 | invalid |
1 | 0 | 1 | 0 | invalid |
1 | 0 | 1 | 1 | invalid |
1 | 1 | 0 | 0 | mov.f32 |
1 | 1 | 0 | 1 | mov.f32 |
1 | 1 | 1 | 0 | pcoeff, ptoff |
1 | 1 | 1 | 1 | pcoeff, ptoff |