SGX543

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Instruction set

It looks like instructions are 8 bytes long. Roughly speaking - first 4 bytes contain opcode and addressing mode. Second 4 bytes contain operands encoding.

Bit encoding used in this reference:

value meaning
0 bit clear
1 bit set
x dont care
? unknown

Predicates:

Not sure about predicates yet, but they are used to mask execution of certain instructions.

Notation is the following: 

<predicate> <instruction>

For example: 

!p0 mad.f32

To reduce amount of examples - they are not listed with predicates.

It is assumed that all predicates are applicable to all instructions in the group unless opposite is indicated.

Modifier and dest data format:

At the moment it is not known which of the data format fields is dest and which is source.

This is the reason why term modifier is mixed with term dest data format.

0x00000000 - 0x08000000

Instructions: mad

Encoding:

7 6 5 4 3 2 1 0
opcode1 data_format predicate
0 0 0 0 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

data_format:

2 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

Examples: 

mad.f32
 
mad.f16

0x08000000 - 0x10000000

Instructions: mul.f32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 0 1
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

mul.f32

0x10000000 - 0x18000000

Instructions: mul.f16

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 1 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

mul.f16

0x18000000 - 0x20000000

Instructions: dot.f32, mad.f32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 0 1 1
7 6 5 4 3 2 1 0
opcode2
x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

opcode2:

5 value
0 dot.f32
1 mad.f32

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 !p0
1 0 1 !p1
1 1 0 !p2
1 1 1 Pn

Examples: 

dot.f32

mad.f32

0x20000000 - 0x28000000

Instructions: dot, mov, rsq, rcp, exp, log

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 0 0 x
7 6 5 4 3 2 1 0
op_sel data_format
x x x x x x
7 6 5 4 3 2 1 0
opcode2
x 1 x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

data_format:

5 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

opcode2 (depends on op_sel):

op_sel 6 5 4 value
0 0 0 0 invalid
0 0 0 1 invalid
0 0 1 0 dot
0 0 1 1 invalid
0 1 0 0 invalid
0 1 0 1 mov
0 1 1 0 rsq
0 1 1 1 rcp
op_sel 6 5 4 value
1 0 0 0 invalid
1 0 0 1 invalid
1 0 1 0 invalid
1 0 1 1 invalid
1 1 0 0 exp
1 1 0 1 log
1 1 1 0 invalid
1 1 1 1 invalid

Examples: 

dot.f32
mov.f32
rsq.f32
rcp.f32
exp.f32
log.f32

dot.f16
mov.f16
rsq.f16
rcp.f16
exp.f16
log.f16

0x28000000 - 0x30000000

Instructions: dot, mov, rsq, rcp

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 0 1 x
7 6 5 4 3 2 1 0
data_format
x x x x x x x
7 6 5 4 3 2 1 0
opcode2
x 1 x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

data_format:

5 value
0 f32
1 f16

predicate:

1 0 value
0 0
0 1 p0
1 0 !p0
1 1 Pn

opcode2:

6 5 4 value
0 0 0 invalid
0 0 1 invalid
0 1 0 dot
0 1 1 invalid
1 0 0 invalid
1 0 1 mov
1 1 0 rsq
1 1 1 rcp

Examples: 

dot.f32
mov.f32
rsq.f32
rcp.f32

dot.f16
mov.f16
rsq.f16
rcp.f16

0x30000000 - 0x38000000

Instructions: rcp, rsq, log, exp

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 1 0
7 6 5 4 3 2 1 0
data_format
x x x x x x
7 6 5 4 3 2 1 0
opcode2 modifier
x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

modifier should be omitted if data_format matches modifier.

Fields:

opcode2:

2 1 value
0 0 rcp
0 1 rsq
1 0 log
1 1 exp

data_format:

6 5 value
0 0 f32
0 1 f16
1 0 fx10
1 1 invalid

modifier:

0 value
0 f32
1 fx10

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

rcp.f32
rsq.f32
log.f32
exp.f32

rcp.f32.fx10
rsq.f32.fx10
log.f32.fx10
exp.f32.fx10

rcp.f16.f32
rsq.f16.f32
log.f16.f32
exp.f16.f32

rcp.f16.fx10
rsq.f16.fx10
log.f16.fx10
exp.f16.fx10

rcp.fx10.f32
rsq.fx10.f32
log.fx10.f32
exp.fx10.f32

rcp.fx10
rsq.fx10
log.fx10
exp.fx10

0x38000000 - 0x40000000

Instructions: mov, cmov, cmov8

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 0 1 1 1
7 6 5 4 3 2 1 0
cond
x x x x x x x
7 6 5 4 3 2 1 0
opcode2 data_format
x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

cond is only applicable to cmov and cmov8 since this is conditional move.

Fields:

opcode2:

7 6 value
0 0 mov
0 1 cmov
1 0 cmov8
1 1 invalid

cond:

6 value
0 eqzero
1 ltzero

data_format:

2 1 0 value
0 0 0 i8
0 0 1 i16
0 1 0 i32
0 1 1 fx10
1 0 0 f16
1 0 1 f32
1 1 0 invalid
1 1 1 invalid

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

mov.i8
mov.i16
mov.i32
mov.fx10
mov.f16
mov.f32

cmov.eqzero.i8
cmov.eqzero.i16
cmov.eqzero.i32
cmov.eqzero.fx10
cmov.eqzero.f16
cmov.eqzero.f32

cmov8.eqzero.i8
cmov8.eqzero.i16
cmov8.eqzero.i32
cmov8.eqzero.fx10
cmov8.eqzero.f16
cmov8.eqzero.f32

cmov.ltzero.i8
cmov.ltzero.i16
cmov.ltzero.i32
cmov.ltzero.fx10
cmov.ltzero.f16
cmov.ltzero.f32

cmov8.ltzero.i8
cmov8.ltzero.i16
cmov8.ltzero.i32
cmov8.ltzero.fx10
cmov8.ltzero.f16
cmov8.ltzero.f32

0x40000000 - 0x48000000

Instructions: pack, (mov)

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 0 0 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
modifier data_format
x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

when modifier matches data_format it shall be omitted since it has no effect in terms of packing.

furthermore instruction mnemonic shall be replaced to mov

Fields:

data_format:

0 value
0 u8
1 s16

modifier:

3 2 1 value
0 0 0 u8
0 0 1 s8
0 1 0 o8
0 1 1 u16
1 0 0 s16
1 0 1 f16
1 1 0 f32
1 1 1 invalid

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

mov.u8
pack.s16.u8
pack.u8.s8
pack.s16.s8
pack.u8.o8
pack.s16.o8
pack.u8.u16
pack.s16.u16
pack.u8.s16
mov.s16
pack.u8.f16
pack.s16.f16
pack.u8.f32
pack.s16.f32

0x48000000 - 0x50000000

Instructions: this group only contains illegal instructions

Encoding:

7 6 5 4 3 2 1 0
opcode1
0 1 0 0 1 x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x50000000 - 0x58000000

Instructions: and.u32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 0 1 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

and.u32

0x58000000 - 0x60000000

Instructions: xor.u32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 0 1 1
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

xor.u32

0x60000000 - 0x68000000

Instructions: shl.u32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 1 0 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

shl.u32

0x68000000 - 0x70000000

Instructions: shr.u32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 1 0 1 x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

shr.u32

0x70000000 - 0x78000000

Instructions: rlp.u32

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
0 1 1 1 0 x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 0 value
0 0 0
0 0 1 p0
0 1 0 p1
0 1 1 p2
1 0 0 p3
1 0 1 !p0
1 1 0 !p1
1 1 1 Pn

Examples: 

rlp.u32

0x78000000 - 0x80000000

Instructions: this group only contains illegal instructions

Encoding:

7 6 5 4 3 2 1 0
opcode1
0 1 1 1 1 x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0x80000000 - 0x88000000

Instructions: add.fx8

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
1 0 0 0 0 x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

predicate:

2 1 value
0 0
0 1 p0
1 0 p1
1 1 !p0

Examples: 

add.fx8

0x88000000 - 0x90000000

Instructions: add.fx8, sub.fx8

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
1 0 0 0 1 x
7 6 5 4 3 2 1 0
opcode2
x x x x x x
7 6 5 4 3 2 1 0
x x x x 0 0 x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bits 2, 3 in byte 2 set to 1 produces invalid instruction

Fields:

opcode2:

5 4 value
0 0 add.fx8
0 1 sub.fx8
1 0 invalid
1 1 invalid

predicate:

2 1 value
0 0
0 1 p0
1 0 p1
1 1 !p0

Examples: 

add.fx8

sub.fx8

0x90000000 - 0x98000000

Instructions: add.fx8, sub.fx8, min.fx8, max.fx8

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
1 0 0 1 0 x
7 6 5 4 3 2 1 0
opcode2
x x x x x x
7 6 5 4 3 2 1 0
x x x x x x x 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Notes:

Having bit 0 in byte 2 set to 1 produces invalid instruction

Fields:

opcode2:

5 4 value
0 0 add.fx8
0 1 sub.fx8
1 0 min.fx8
1 1 max.fx8

predicate:

2 1 value
0 0
0 1 p0
1 0 p1
1 1 !p0

Examples: 

add.fx8

sub.fx8

min.fx8

max.fx8

0x98000000 - 0xA0000000

Instructions: mad.u8

Encoding:

7 6 5 4 3 2 1 0
opcode1 predicate
1 0 0 1 1 x
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
modifier
x x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

Fields:

modifier:

3 value
0
1 sat

predicate:

2 1 value
0 0
0 1 p0
1 0 p1
1 1 !p0

Examples: 

mad.u8
mad.sat.u8

0xA0000000 - 0xA8000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 0 0 0 0 0
7 6 5 4 3 2 1 0
x x x x x x x x
7 6 5 4 3 2 1 0
x x x x x x
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xA8000000 - 0xB0000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xB0000000 - 0xB8000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xB8000000 - 0xC0000000

7 6 5 4 3 2 1 0
opcode1
1 0 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xC0000000 - 0xC8000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xC8000000 - 0xD0000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xD0000000 - 0xD8000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xD8000000 - 0xE0000000

7 6 5 4 3 2 1 0
opcode1
1 1 0 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xE0000000 - 0xE8000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xE8000000 - 0xF0000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 0 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xF0000000 - 0xF8000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 1 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?

0xF8000000 - 0xFF000000

7 6 5 4 3 2 1 0
opcode1
1 1 1 1 1 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
? ? ? ? ? ? ? ?
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