Cookie
Cookie is the codename of the USB Charge Management IC of the PS Vita. This IC works in conjunction with Abby to charge the battery of the unit. ??When the PS Vita is powered off and connected to a PC, this chip is likely what the USB sees??
Cookie is absent from units without a battery (DEM/PDEL). Ernie is connected to Cookie via I²C.
Hardware
SN99057RSBR
The Texas Instruments SN99057RSBR is used in Fat models. A TS3USB31RSER USB switch is connected to Cookie and Kermit's USB interfaces.
Texas Instruments has stated that “the SN99057RSBR part was a custom device manufactured for a specific company.”
The device is now obsolete nor do we have access to the datasheet.
| Pin | Type | Description |
|---|---|---|
| 1 | ? | N/C |
| 2 | I/O | To bq27520-G1 A2 - SOC_INT, indicates battery charged > threshold |
| 3 | PWR | |
| 4 | PWR | |
| 5 | PWR | |
| 6 | I/O | To TS3USB31 USB D+ |
| 7 | I/O | To TS3USB31 USB D- |
| 8 | I/O | To Kermit GPIO B20 |
| 9 | I/O | To Kermit GPIO A23 |
| 10 | I/O | To Kermit GPIO A25 |
| 11 | ? | To passives |
| 12 | ? | To capacitor |
| 13 | PWR | |
| 14 | PWR | |
| 15 | PWR | Net 1 (Battery) |
| 16 | PWR | Net 1 (Battery) |
| 17 | PWR | Net 1 (Battery) |
| 18 | PWR | Net 2 |
| 19 | PWR | Net 2 |
| 20 | PWR | Net 2 |
| 21 | PWR | |
| 22 | ? | N/C |
| 23 | GND | |
| 24 | GND | |
| 25 | PWR | Net 3 |
| 26 | PWR | Net 3 |
| 27 | PWR | Net 4 |
| 28 | PWR | Net 4 |
| 29 | PWR | Net 4 |
| 30 | PWR | Net 4 |
| 31 | PWR | Net 5 |
| 32 | PWR | Net 5 |
| 33 | ? | To capacitor |
| 34 | PWR | Net 6 (USB VBUS) |
| 35 | PWR | Net 6 (USB VBUS) |
| 36 | GND | |
| 37 | I/O | To right daughterboard |
| 38 | I/O | To Syscon (G8) |
| 39 | I2C | SDA |
| 40 | I2C | SCL |
C3008A2
A different Texas Instruments IC is used on Slim units. USB data lines enter this chip and two other lines go from it to Kermit USB (presumably). We see from pictures of the PCB that the USB data lanes go into and out of the Texas Instruments chip on the PS Vita Slim. This is different from the SN99057 on the PS Vita FAT units which routes the USB data lanes in parallel (for charge sensing).
The following marking is present on the chip (where xxxx varies between devices):
C3008
A2
TI 37K
xxxx G4