SKBL

Common

These functions are at different offsets than those of SceTzs modules.

Offsets are relative to SKBL text segment base address. See Secure DRAM.

SceKernelModulemgr

get_module_object

Version	offset	mode
3.60	0x2350	thumb

SceModuleObject *get_module_object(SceUID modid);

get_module_bootstart

Version	offset	mode
3.60	0x2744	thumb

int get_module_bootstart(SceUID modid, void *entry);

sceKernelLoadModuleWithBuffer

Version	offset	mode
3.60	0x2494	thumb

SceUID sceKernelLoadModuleWithBuffer(const void *pModule, SceSize size);

sceKernelStartModule

Version	offset	mode
3.60	0x2710	thumb

int sceKernelStartModule(SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);

sceKernelStartModuleForPid

Version	offset	mode
3.60	0x25BC	thumb

int sceKernelStartModuleForPid(SceUID pid, SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);

sceKernelLoadStartModule

Version	offset	mode
3.60	0x20B0	thumb

typedef struct SceTzsModule {
	const void *pModule;
	const void *pModuleEnd;
} SceTzsModule;

int sceKernelLoadStartModule(SceTzsModule *pModule, void *argp);

print_module_load_info

Version	offset	mode
3.60	0x2A70	thumb

SceSysmem

sceGUIDReferObjectWithClass

Version	offset	mode
3.60	0x9DF8	thumb

int sceGUIDReferObjectWithClass(SceUID uid, SceClass *pClass, SceKernelObject **ppEntry);

sceKernelUidRelease

Version	offset	mode
3.60	0x9E60	thumb

int sceKernelUidRelease(SceUID uid);

sceKernelIsColdBoot

Version	offset	mode
3.60	0x14904	thumb

int sceKernelIsColdBoot(void);

memcpy

Version	offset	mode
3.60	0x15920	thumb

void *memcpy(void *dst, const void *src, int len);

memset

Version	offset	mode
3.60	0x15A30	thumb

void *memset(void *dst, int ch, int len);

sceKernelCpuIcacheInvalidateAll

Version	offset	mode
3.60	0x16480	thumb

void sceKernelCpuIcacheInvalidateAll(void);

sceKernelCpuIcacheInvalidateMVAURange

Version	offset	mode
3.60	0x164A0	thumb

void sceKernelCpuIcacheInvalidateMVAURange(void *start, SceSize size);

sceKernelCpuDcacheCleanMVACRange

Version	offset	mode
3.60	0x1650C	thumb

void sceKernelCpuDcacheCleanMVACRange(void *addr, unsigned int size);

sceKernelDcacheWritebackInvalidateRange

Version	offset	mode
3.60	0x1652C	thumb

Temp name was sceKernelCpuDcacheCleanInvalidateMVACRangeForKernel, sceKernelCpuDcacheWritebackInvalidateRangeForKernel.

// DCCIMVAC, Data cache clean and invalidate by MVA (PoC)
void sceKernelDcacheWritebackInvalidateRange(const void *addr, unsigned int size);

sceKernelCorelockContextInitialize

Version	offset	mode
3.60	0x16A80	thumb

typedef struct SceCorelockContext {
	int lock;
	int16_t core_count;
	int16_t last_wait_core; // 0:core3, 1:core0, 2:core1, 3:core2
} SceCorelockContext;

void sceKernelCorelockContextInitialize(SceCorelockContext *ctx);

sceKernelCorelockLock

Version	offset	mode
3.60	0x16A8C	thumb

void sceKernelCorelockLock(SceCorelockContext *ctx, int core);

sceKernelCorelockUnlock

Version	offset	mode
3.60	0x16AC0	thumb

void sceKernelCorelockUnlock(SceCorelockContext *ctx);

sceKernelDcacheCleanRange_0x20

Version	offset	mode
3.60	0x16E54	thumb

int sceKernelDcacheCleanRange_0x20(const void *start, SceSize size);

sceKernelDcacheCleanRange_0x1

Version	offset	mode
3.60	0x16E60	thumb

int sceKernelDcacheCleanRange_0x1(const void *start, SceSize size);

sceKernelCpuUnrestrictedMemcpy

Version	offset	mode
3.60	0x16E90	thumb

int sceKernelCpuUnrestrictedMemcpy(void *dst, const void *src, SceSize len);

sceKernelCpuGetPaddr

Version	offset	mode
3.60	0x179E0	thumb

int sceKernelCpuGetPaddr(void *VA,uintptr_t *pPA);