Cmep registers

0xE0000000: Cmep/ARM

0xE0000000: MailboxCmepToArm

Response to ARM is written here.

0xE0000010: MailboxArmToCmep

Request from ARM is written here.

0xE0000020: MailboxCmepToDebugger

Size: 2 * DOWORD.

0xE0000028: MailboxDebuggerToCmep

Size: 2 * DWORD.

0xE0000060: MailboxDebuggerToCmep2

Size: 2 * DWORD.

0xE0010000: Cmep controller

Address	Length	Description
0xE0010000	4	TZ sets it to 1 then 0 and it appears cmep resets.
0xE0010004	4	Read by second_loader, checked against mask (& 5) and (& 8). Read by TZ after setting reset, checked if flag 0x80000000 is set. Ex: 0x80000005. Writing values to it from cmep does nothing.

0xE0010000: CmepReset

   Bit0: Hangs. ARM uses this to reset the cMeP subsystem.

0xE0010004: CmepStatus

   Bit31:  IsCmepAlive
   Bit0-2: ?

   0xE0010000: 00 00 00 00 05 00 00 80 00 00 00 00 00 00 00 00
   0xE0010010: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0xE0010010: Unknown

Reads back 0x7FF. Then hangs after delay.

   Bit5: Disables Key* registers, and Cmep KeyRings.

No bit appears to disable Rsa* registers, or Bigmac*.

   0xE0020000: 0F 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
   0xE0020010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0xE0020000: Cmep 0xE0020000

Address	Length	Description
0xE0020000	4	second_loader sets it to 0x30003. secure_kernel sets it to 0x2000F. Bit 0x10000 allows ARM to reset cmep. Bit 0x1 makes bootrom load secure_kernel.
0xE0020004	4	?Allowed DMAC5 keyring to Non-Secure?. Read by second_loader, checked against 0x8000001F. Also set by second_loader when setting 0x30003 at 0xE0020000.
0xE0020020	4	Checked for 0 by second_loader.
0xE0020040	0x10	Read As
0xE0020100	0x20	256 bit key from keyring 0x602 is copied here by second_loader.

0xE0020000: Unknown

   Bit0: Reboot when cleared.
   Bit1: Hang when cleared. Unrecoverable
   Bit2: No hang when cleared.
   Bit3: No hang when cleared.
   Bit4:
   Bit5:
   Bit16: No hang when cleared.
   Bit17:

0xE0020004: Unknown

second_loader writes 0x30003 followed by 0 here, after clearing keys.

E0020020: Unknown

rsa_expmod() reads and writes back this register before reading the result of the RSA operation.

May be a kind of timer or working state.

0xE0030000: Bigmac Keyring controller

Currently there is no known way to change keyrings flags in any way (doing keyring_flags |= or_flags).

  +0x00 = EEP_DATA0
  +0x04 = EEP_DATA1
  +0x08 = EEP_DATA2
  +0x0C = EEP_DATA3
  +0x10 = EEP_DATA4
  +0x14 = EEP_DATA5
  +0x18 = EEP_DATA6
  +0x1C = EEP_DATA7
  +0x20 = EEP_KEYRING_ID
  +0x24 = EEP_SET_FLAGS
  +0x28 = EEP_GET_FLAGS_REQ
  +0x2C = EEP_GET_FLAGS_RESP

Writing keyring_id to EEP_KEYRING_ID will trigger writing the EEP_DATA registers into said keyring.

Writing ((flags<<16)|keyring_id) to EEP_SET_FLAGS set flags for a keyring. flags is a bit mask.

Writing keyring_id to EEP_GET_FLAGS_REQ returns current flags in EEP_GET_FLAGS_RESP.

This device is mapped to ScePervasiveResetReg +0x190 for controlling reset and enabling mask writing.

typedef struct BigmacKeyringControllerRegs { // 0xE0030000
	SceUInt32 data[8];
	/*
	 * Write data to keyring. It is needed to have the 0x800 flag (direct write) set.
	 * If the keyring is disabled, enable it.
	 */
	SceUInt32 keyring_id;

	/*
	 * Clear keyring flags
	 *
	 * Mask       | Description
	 * 0x0000FFFF : Target keyring id
	 * 0xFFFF0000 : Clear flags
	 */
	SceUInt32 keyring_flags;

	/*
	 * if ((keyring_flags_resp & 2) != 0) enabled else disabled
	 */
	SceUInt32 keyring_flags_chk;
	SceUInt32 keyring_flags_resp;
} BigmacKeyringControllerRegs;

0xE0030000-0xE003001F: KeyringSetValue

Size: 8 * DWORD.

0xE0030020: KeyringSetValueTrigger

Write a keyring to this address, and the Bigmac Keyring Controller will write value written above to it.

If the keyring is not enabled, enable it (to enable the keyring it must have some flags else you cannot enable that keyring).

0xE0030024: KeyringSetFlags

   Bit0-15:  KeyringNumber
   Bit16-31: KeyringClearFlags

0xE0030028: KeyringQueryFlags

   Bit0-15: KeyringId

0xE003002C: KeyQueryFlagsResult

   Bit0 (0x00000001):    KeyringExists
   Bit1 (0x00000002):    KeyringEnabled. You cannot use a key if this is not set.
   Bit2 (0x00000004):    Unknown
   Bit11 (0x00000800):   ?DirectWriteByCmepAllowed?
   Bit12 (0x00001000):   ?DirectReadByCmepAllowed? (it makes reads from cmep return 0)
   Bit16 (0x00010000):   Clearable   | AesEncryptAllowed (CTR+CBC+ECB, any key size)
   Bit17 (0x00020000):   Clearable   | AesDecryptAllowed (CTR+CBC+ECB, any key size)
   Bit18:   Clearable   | ShaHmacAllowed (SHA1+SHA256)
   Bit19:   Clearable   | AesCmacAllowed
   Bit20:   Clearable   | EmmcCryptoAllowed (qualified guess!, maybe AES XTS)
   Bit21:   Fixed       | IsMaster
   Bit22:   Fixed       | MemberOfGroup0
   Bit23:   Fixed       | MemberOfGroup1
   Bit24:   Fixed       | MemberOfGroup2
   Bit25:   Fixed       | MemberOfGroup3
   Bit26:   Clearable   | WriteByBigmacKRControllerAllowed
   Bit27:   Clearable   | WriteByKeyringAllowed
   Bit28:   Clearable   | ReadByKeyringAllowed

A master keyring can only write into a slave keyring belonging to the same group(s) as itself.

A master keyring cannot write into a non-slave keyring or external memory.

Normal keyrings are keyrings that do not belong to any group (bit21-25 are all zeroes). They can be written by slaves of groups, and also by normal non-keyring operations.

A slave keyring can write output to a normal keyring or to external memory.

VULN!! If a keyring has AesDecryptAllowed, it is possible to encrypt arbitrary AES blocks without AesEncryptAllowed by using AES CTR mode.

SceBignum controller

0xE0040108: RsaSignatureBuffer

Size: 0x100 bytes.

0xE0040400: RsaModulusBuffer

Size: 0x100 bytes.

0xE0040800: RsaControl

In DWORDs.

0xE0040800: RsaStatus

   Bit31: Busy

Bigmac Crypto Controller

// base: 0xE0050000 (channel0), 0xE0050080 (channel1)
typedef struct BigmacOp {
	const void *src;
	union {
		void *dst;
		SceUInt32 dst_keyring_id;
	};
	SceSize len;
	int func; // operation

	SceUInt32 work_keyring_id;
	void *iv;
	void *next;
	int ready; // Writing 1 here starts the operation.

	int status;
	int res; // Set when invalid keyring (0xFFF). Bit18: Set when keyring is not allowed to perform operation.
} BigmacOp;

0xE005000C: Bigmac crypto controller function

Unlike for Dmac5, DES is not supported for KR Controller, but most commands are the same.

 Bit0-6: Algorithm
 0x00 = Zeroes?
 0x01 = AesEcbEncrypt
 0x02 = AesEcbDecrypt
 0x03 = Sha1
 0x04 = Rng
 0x05 = Zeroes
 0x06 = Zeroes
 0x07 = Zeroes
 0x09 = AesCbcEncrypt
 0x0A = AesCbcDecrypt
 0x0B = Sha224
 0x0C = memset
 0x0D = Zeroes
 0x0E = Zeroes
 0x0F = Zeroes
 0x10 = AesCtr
 0x11 = AesCtrEncrypt
 0x12 = AesCtrDecrypt
 0x13 = Sha256
 0x1B = !!! HANG !!!
 0x23 = HmacSha1, keylength=32 bytes
 0x2B = !!! HANG !!!
 0x33 = HmacSha256, keylength=32 bytes
 0x3B = AesCmac
 0x41  = !!! HANG !!! (DES-64-ECB encrypt in DMAC5)
 0x43 = <0x03>
 0x4B = <0x0b>
 0x53 = <0x13>
 0x61  = !!! HANG !!!
 0x7B = <0x3b>
 0x141 = !!! HANG !!!

   Bit7:    UseExternalKey
   Bit8-10: KeySize (0=64bit, 1=128bit, 2=192bit, 3=256bit)
            (Applies only to AesEcb, AesCbc, AesCmac)
   Bit11:   Nothing noticable for AesEcbEncrypt
   Bit12:   Nothing noticable for AesEcbEncrypt
   Bit24:   Causes hang
   Bit25:   Causes hang
   Bit28:   IsDstKeyring

The following are known to be able to write keyrings:

 * AesEcbEncrypt/Decrypt:
     Size is rounded up to multiple of 4.
     If size > 16, size = 16.

     Read |size| bytes from |src| into HW state.
     The remaining 16-|size| bytes of state *ARE KEPT FROM RESULT OF PREVIOUS AES OPERATION*.
     VULN! This allows key recovery of all slave keyrings during boot.

     The key written to keyring is always 16 bytes long, padded with 00's.

 * AesCbcEncrypt/Decrypt: Size is rounded up to multiple of 4. 
 * AesCtrEncrypt/Decrypt: Size is rounded up to multiple of 4.
 * AesCmac                Puts the 16 byte hash into keyring.
                          Bytes 16-31 are *FORCED* 0.
 * Sha1:                  Puts the 20 byte hash into keyring.
                          Bytes 20-31 are *FORCED* 0.
 * Sha224:                Puts the 28 byte hash into keyring.
                          Bytes 28-31 are *FORCED* 0.
 * Sha256:                Puts the 32 byte hash into keyring.
 * HmacSha1               Probably same as Sha1.
 * HmacSha256             Probably same as Sha256.
 * Rng

AesCtrEncrypt when having a keyring dst, still reads from src.

VULN! Any SHA with length==0 produces an output of all zeroes!

0xE005003C: Bigmac Rng

Reads a random value.

0xE0050200: Bigmac External Key

Size: 0x20 bytes

VULN! Allows partial overwrite. However when using keyring crypto, this key remains unaffected thus it cannot be used to recover keyring keys.

Bigmac Key Ring Base

See F00D Key Ring Base.

0xE0058000: Bigmac KeyRings

Size: 0x10000 bytes.

0x000-0x07F:

   Initial state: Empty keyrings.
   0x000-0x007: Empty group0 slave keyrings, for AES decryption only.
   0x008-0x00F: Empty group1 slave keyrings, any algo.
   0x010-0x01F: Empty group2 slave keyrings, for AES decryption only.
   0x020-0x02F: Empty group3 slave keyrings, any algo.
   0x030-0x07F: Empty normal keyrings, any algo.

0x100-0x17F:

   Initial state: Empty keyrings.
   0x100-0x17F: Empty normal keyrings, any algo.

0x200-0x217:

   Initial state: Filled in, key material.
   0x200-0x203: AES decryption-only keys (for memory buffers).
   0x204-0x205: Master keys (for group0), any algo.
   0x206-0x20D: Master keys (for group1), any algo.
   0x20E-0x20F: Emmc keys, fully protected.
   0x210-0x217: General purpose keys (for memory buffers).

0x300-0x3FF:

   Initial state: Filled in, key material.
   0x300-0x33F: AES decryption-only keys (for memory buffers).
   0x340-0x343: Master keys (for group2), any algo.
   0x344-0x353: Master keys (for group3), any algo.
   0x354-0x3FF: General purpose keys (for memory buffers).

0x400-0x47F:

   Initial state: Empty data storage, read-write from keyring.

0x500-0x57F:

   Initial state: Empty data storage, read-write from keyring.

0x600-0x607:

   Initial state: Filled in data, read-only. Keyring only.
   0x603: DWORD BootromFlags.
     Bit0-15: HasRsaRevocationKey. This is set to 0xFFFF.
     Bit16:   UseAlternativeEmmcClock

0x700-0x77F:

   Initial state: Filled in data, read-only. Keyring only.
   0x700-0x708: RsaRevocationKey0
   0x708-0x710: RsaRevocationKey1
   0x710-0x718: RsaRevocationKey2
   0x718-0x720: RsaRevocationKey3
   0x720-0x728: RsaRevocationKey4
   0x728-0x730: RsaRevocationKey5
   ...
   0x778-0x780: RsaRevocationKey15

0xE0070000: SceEmmcController

Address	Length	Description
0xE0070000	4	Ex: 1. Set to 0, then 1 after writing to 0xE0070008.
0xE0070008	4	Set to 0x020E020F in second_loader. ?eMMC related?
0xE007000C	4	Ex: 2.
0xE0070014	4	Set to 6 under some condition in second_loader.

0xE0070000: EmmcCrypto Toggle/Status?

Toggle: Set to 1.

Status: enabled emmc enc/dec?

0xE0070004: EmmcCrypto avalaible status

bit0(& 1): Not available -> second_loader throws error.

0xE0070008: EmmcCrypto keyset

Read value example: 0x20E and 0x20F (FW 1.69-3.73).

write only.

0xE007000C: Unknown

Read value example: 2

0xE00C0000

0xE00CC000: Unknown

Unknown. Read value example: 0x10006331

0xE00CC014: Unknown

Unknown. Read value example: 0x300000

0xE00CC070: Unknown

Unknown. Read value example: 1

0xE00CC078: Unknown

Unknown. Read value example: 0x300