SceClockgen: Difference between revisions

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== Hardware ==
== Hardware ==


<code>P1P40167</code> ''1.8V 4-PLL Low Power Clock Generator'' by ON Semiconductor (onsemi)
Clockgen is a derivative of the <code>P1P40167</code> ''1.8V 4-PLL Low Power Clock Generator'' by ON Semiconductor (onsemi).
The reference frequency of 27 MHz is generated thank to an on-board oscillator (from Analog Devices).


An oscillator provides the reference 27MHz frequency from which 5 clock signals are derived:
According to the <code>P1P40167</code> datasheet, 5 clock signals are generated by Clockgen:
* Fixed 22.5792 MHz
{| class="wikitable"
* Fixed 27 MHz (= buffered reference clock)
|-
* Fixed 37 MHz (w/ spread spectrum feature)
! Clock !! Usage !! Notes
* Fixed 48 MHz (<code>UCLK</code>?)
|-
* Configurable ''Audio Clock'' (22.5792 or 24.576 MHz)
| 22.5792 MHz || <code>CameraClk</code>? ||
|-
| 27 MHz || <code>WlanBtClk</code>? || Buffered oscillator clock
|-
| 37 MHz || ? || Configurable spread-spectrum. Always on?
|-
| 48 MHz || <code>UCLK</code>? || "Main" Kermit clock? Always on.
|-
| ''Audio Clock'' || <code>AudioClk</code>? || Configurable (22.5792 or 24.576 MHz)
|}
However, <code>MotionClk</code> is missing from this list (maybe it's the 37 MHz clock?).


Kermit communicates with Clockgen via I²C.
Communication between Kermit and Clockgen is performed over I²C (bus 0, address 0xD2).


== Libraries ==
== Libraries ==
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This is a guessed name.
This is a guessed name.


Changes behaviour of [[#sceClockgenInit]]. Default is true.
Only affects how [[#sceClockgenInit|sceClockgenInit]] reads the Clockgen registers:
* If <code>single_byte_mode</code> is false, all registers are read using a single 0x10-byte read burst
* Otherwise, the registers are read one by one using single-byte reads (in this case, only registers 0~2 are read)


<source lang="C">int sceClockgenSetProtocolForDriver(SceBool protocol);</source>
By default, SceClockgen uses the single byte mode.
 
<source lang="C">int sceClockgenSetProtocolForDriver(SceBool single_byte_mode);</source>


=== sceClockgenGetRegValueForDriver ===
=== sceClockgenGetRegValueForDriver ===
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|}
|}


<source lang="C">int sceClockgenSetSpectrumSpreadingForDriver(SceUInt32 mode);</source>
Configures the spread spectrum output (37 MHz).
 
Only supported if the vendor ID is 0x3, 0x4, 0x7, 0x8, 0x9, 0xC or 0xF. If vendor ID is 0x4, the revision code must not be 0.
 
If vendor ID is 0xF and revision code is 0x4, additional configuration is performed.
 
<source lang="C">
/* If `ss` is negative, restores the configuration read during sceClockgenInit.
* Otherwise, if vendor ID is NOT 0x4, regular P1P40167 behavior:
*  - 0~1  : no spread      (reg = 0)
*  - 2~6  : -0.5% spread  (reg = 1)
*  - 7~14 : -1% spread    (reg = 2)
*  - 15~24: -2% spread    (reg = 4)
*  - >= 25: -3% spread    (reg = 6)
*
* Otherwise - if vendor ID is 0x4 - alternative behavior:
*  - 0~1  : no spread      (reg = 0)
*  - 2~6  : ?              (reg = 1)
*  - 7~11 : ?              (reg = 2)
*  - 12~16: ?              (reg = 3)
*  - 17~21: ?              (reg = 4)
*  - 22~26: ?              (reg = 5)
*  - >= 27: ?              (reg = 6)
*/
int sceClockgenSetSpectrumSpreadingForDriver(SceInt32 ss);
</source>


=== sceClockgenGetRevisionForDriver ===
=== sceClockgenGetRevisionForDriver ===
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|}
|}


This is a guessed name.
This is a guessed name. Returns the contents of Clockgen register 0 (Vendor ID & Revision Code).


<source lang="C">int sceClockgenGetRevisionForDriver(void);</source>
<source lang="C">
/* Bit <7:4>: revision code
* Bit <3:0>: vendor ID
*/
int sceClockgenGetRevisionForDriver(void);
</source>


=== sceClockgenWlanBtClkEnableForDriver ===
=== sceClockgenWlanBtClkEnableForDriver ===
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| 0.940-3.60 || 0x06663ECA
| 0.940-3.60 || 0x06663ECA
|}
|}
Enables the 22 MHz output of Clockgen.


<source lang="C">int sceClockgenCameraClkEnableForDriver(void);</source>
<source lang="C">int sceClockgenCameraClkEnableForDriver(void);</source>
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<source lang="C">
<source lang="C">
// 44100 or 48000, default 48000
// Frequency must be 44100 or 48000 (default configuration is 48000)
int sceClockgenAudioClkSetSamplingFreqForDriver(SceUInt32 frequency);
int sceClockgenAudioClkSetSamplingFreqForDriver(SceUInt32 frequency);
</source>
</source>
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This is a guessed name.
This is a guessed name.
If Clockgen revision is at least 2, sets bit 2 of Clockgen register 1 (<code>Reserved</code> in P1P40167 datasheet).


<source lang="C">int sceClockgenMotionClkEnableForDriver(void);</source>
<source lang="C">int sceClockgenMotionClkEnableForDriver(void);</source>
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This is a guessed name.
This is a guessed name.
If Clockgen revision is at least 2, clears bit 2 of Clockgen register 1 (<code>Reserved</code> in P1P40167 datasheet).


<source lang="C">int sceClockgenMotionClkDisableForDriver(void);</source>
<source lang="C">int sceClockgenMotionClkDisableForDriver(void);</source>

Latest revision as of 22:48, 27 October 2024

Module

Version World Privilege
0.940-3.65 Non-secure Kernel

Hardware

Clockgen is a derivative of the P1P40167 1.8V 4-PLL Low Power Clock Generator by ON Semiconductor (onsemi). The reference frequency of 27 MHz is generated thank to an on-board oscillator (from Analog Devices).

According to the P1P40167 datasheet, 5 clock signals are generated by Clockgen:

Clock Usage Notes
22.5792 MHz CameraClk?
27 MHz WlanBtClk? Buffered oscillator clock
37 MHz ? Configurable spread-spectrum. Always on?
48 MHz UCLK? "Main" Kermit clock? Always on.
Audio Clock AudioClk? Configurable (22.5792 or 24.576 MHz)

However, MotionClk is missing from this list (maybe it's the 37 MHz clock?).

Communication between Kermit and Clockgen is performed over I²C (bus 0, address 0xD2).

Libraries

Known NIDs

Version Name World Visibility NID
0.940-3.60 SceClockgenForDriver Non-secure Kernel 0xFF160234

SceClockgenForDriver

sceClockgenInitForDriver

Version NID
3.60 0x0BA41732

This is a guessed name. 

int sceClockgenInitForDriver(void);

sceClockgenSetProtocolForDriver

Version NID
3.60 0xEFE8A68C

This is a guessed name.

Only affects how sceClockgenInit reads the Clockgen registers:

  • If single_byte_mode is false, all registers are read using a single 0x10-byte read burst
  • Otherwise, the registers are read one by one using single-byte reads (in this case, only registers 0~2 are read)

By default, SceClockgen uses the single byte mode. 

int sceClockgenSetProtocolForDriver(SceBool single_byte_mode);

sceClockgenGetRegValueForDriver

Version NID
3.60 0x09072366

This is a guessed name. Returns the cached value of Clockgen register reg. 

// reg: between 0 and 2
int sceClockgenGetRegValueForDriver(SceUInt32 reg);

sceClockgenSetSpectrumSpreadingForDriver

Version NID
3.60 0xA2CA8B65

Configures the spread spectrum output (37 MHz).

Only supported if the vendor ID is 0x3, 0x4, 0x7, 0x8, 0x9, 0xC or 0xF. If vendor ID is 0x4, the revision code must not be 0.

If vendor ID is 0xF and revision code is 0x4, additional configuration is performed. 

/* If `ss` is negative, restores the configuration read during sceClockgenInit.
 * Otherwise, if vendor ID is NOT 0x4, regular P1P40167 behavior:
 *  - 0~1  : no spread      (reg = 0)
 *  - 2~6  : -0.5% spread   (reg = 1)
 *  - 7~14 : -1% spread     (reg = 2)
 *  - 15~24: -2% spread     (reg = 4)
 *  - >= 25: -3% spread     (reg = 6)
 *
 * Otherwise - if vendor ID is 0x4 - alternative behavior:
 *  - 0~1  : no spread      (reg = 0)
 *  - 2~6  : ?              (reg = 1)
 *  - 7~11 : ?              (reg = 2)
 *  - 12~16: ?              (reg = 3)
 *  - 17~21: ?              (reg = 4)
 *  - 22~26: ?              (reg = 5)
 *  - >= 27: ?              (reg = 6)
 */
int sceClockgenSetSpectrumSpreadingForDriver(SceInt32 ss);

sceClockgenGetRevisionForDriver

Version NID
3.60 0xCF63B11D

This is a guessed name. Returns the contents of Clockgen register 0 (Vendor ID & Revision Code). 

/* Bit <7:4>: revision code
 * Bit <3:0>: vendor ID
 */
int sceClockgenGetRevisionForDriver(void);

sceClockgenWlanBtClkEnableForDriver

Version NID
0.990-3.60 0x7B28A724 
int sceClockgenWlanBtClkEnableForDriver(void);

sceClockgenWlanBtClkDisableForDriver

Version NID
0.990-3.60 0xB6F0A532 
int sceClockgenWlanBtClkDisableForDriver(void);

sceClockgenCameraClkEnableForDriver

Version NID
0.940-3.60 0x06663ECA 
int sceClockgenCameraClkEnableForDriver(void);

sceClockgenCameraClkDisableForDriver

Version NID
0.940-3.60 0x82F39378 
int sceClockgenCameraClkDisableForDriver(void);

sceClockgenAudioClkEnableForDriver

Version NID
3.60 0x5130682D

This is a guessed name. 

int sceClockgenAudioClkEnableForDriver(void);

sceClockgenAudioClkDisableForDriver

Version NID
3.60 0xF0A0242D

This is a guessed name. 

int sceClockgenAudioClkDisableForDriver(void);

sceClockgenAudioClkSetSamplingFreqForDriver

Version NID
3.60 0x820D3516

This is a guessed name. 

// Frequency must be 44100 or 48000 (default configuration is 48000)
int sceClockgenAudioClkSetSamplingFreqForDriver(SceUInt32 frequency);

sceClockgenMotionClkEnableForDriver

Version NID
3.60 0x62478916

This is a guessed name.

If Clockgen revision is at least 2, sets bit 2 of Clockgen register 1 (Reserved in P1P40167 datasheet). 

int sceClockgenMotionClkEnableForDriver(void);

sceClockgenMotionClkDisableForDriver

Version NID
3.60 0x66AC5580

This is a guessed name.

If Clockgen revision is at least 2, clears bit 2 of Clockgen register 1 (Reserved in P1P40167 datasheet). 

int sceClockgenMotionClkDisableForDriver(void);
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