GPIO Registers: Difference between revisions

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| Port read latched? (1=low, 0=high?) (1 bit each port)
| Port read latched? (1=low, 0=high?) (1 bit each port)
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It looks like +0x10,+0x14,+0x18,+0x1C,+0x20 are related to interrupt enable, and +0x38,+0x3C,+0x40,+0x44,+0x48 to interrupt ack.


== Gpio0 ports ==
== Gpio0 ports ==

Revision as of 22:38, 9 April 2017

MMIO Interfaces

Name Physical address
SceGpio0Reg 0xE20A0000
SceGpio1Reg 0xE0100000

Registers

Offset Size Description
0x00 4 Port mode (1=out, 0=in) (1 bit each port)
0x04 4 Port read (1=low, 0=high?) (1 bit each port)
0x08 4 Port set (1 bit each port)
0x0C 4 Port clear (1 bit each port)
0x14 4 Interrupt mode (2 bits) for interrupts 0-15
0x18 4 Interrupt mode (2 bits) for interrupts 16-31
0x34 4 Port read latched? (1=low, 0=high?) (1 bit each port)

It looks like +0x10,+0x14,+0x18,+0x1C,+0x20 are related to interrupt enable, and +0x38,+0x3C,+0x40,+0x44,+0x48 to interrupt ack.

Gpio0 ports

Bit Description
6 Game card LED
7 PS Button Blue LED