DSI Registers: Difference between revisions

From Vita Development Wiki
Jump to navigation Jump to search
Line 46: Line 46:
| 4
| 4
| Another command FIFO.
| Another command FIFO.
|-
| 0x838
| 4
| DSI bus index? 0 = OLED/LCD, 1 = HDMI
|}
|}

Revision as of 07:28, 29 July 2017

MMIO Interfaces

Name Physical address
SceDsi0Reg 0xE5050000
SceDsi1Reg 0xE5060000

Registers

Offset Size Description
0x004 4 bits 1:0: Video mode (0 = Progressive, 0b11 = Interlaced)
0x00C 4 Clock related
0x014 4 Interrupts (read = triggered interrupts, write = clear interrupt)
0x030 4 bits[31:16] = VSW
0x054 4 Interrupt ack/clear
0x500 4 Command FIFO.
0x510 4 Another command FIFO.
0x838 4 DSI bus index? 0 = OLED/LCD, 1 = HDMI