SceSonyRegbus

From Vita Development Wiki
Revision as of 14:41, 6 October 2024 by CreepNT (talk | contribs) (→‎Registers: Make a table)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

MMIO interface @ 0xE800'0000 (size 0x2000?)

Registers

Default is to be understood as the value seen during observation.

Undocumented offsets are RAZ/WI but may still hold registers. Names in italic are guessed.

Offset Name Type Description
0x0000 ? RW Bits 0xF: Some kind of ACL (default value: 0x4)
0x0004 ? RW Bits 0xF: Some kind of ACL (default value: 0x4)
0x0008 ? RW Bits 0xF: Some kind of ACL (default value: 0x4)
0x000C ? RW Bits 0xF: Some kind of ACL (default value: 0x4)
0x0010 ? RW Bits 0xF: Some kind of ACL (default value: 0xA)
Writing 0xF can trigger DABT in gpu_es4.skprx
0x0014 ? RW Bit 0: ? (writing 1 hangs ARM)
0x0100 ? RW Bit 0: ? (maybe related to secure bus error?)
0x0108 REGBUS_SECERRSTAT RO/WC? Bit 0: secure bus error occurred on Regbus
0x0110 REGBUS_SECERRID RO Secure bus error identifier
0x0114 REGBUS_SECERRADDR RO Secure bus error address
0x0118 REGBUS_SECERRATTR RO Secure bus error attributes
0x011C REGBUS_SECERRINFO RO Secure bus error info
0x0134 ? RO ? (seen values: 0xDC04, 0xB781, 0xEEDA)
0x0140 ? RO 4 words. Values similar to +0x134.
Maybe some kind of error log.
0x0150 ? RW Bits 0xFF: ? (default value: 0)
0x1100 ? RO Bit 0: ? (maybe related to non-secure bus error?)
0x1108 REGBUS_ERRSTAT RO/WC? Bit 0: non-secure bus error occurred on Regbus
0x1110 REGBUS_ERRID RO Non-secure bus error identifier
0x1114 REGBUS_ERRADDR RO Non-secure bus error address
0x1118 REGBUS_ERRATTR RO Non-secure bus error attributes
0x111C REGBUS_ERRINFO RO Non-secure bus error info
0x1120 ? RO Seen values: 0x2
0x1124 ? RW Bits 0x3: ? (default value: 0)
0x1128 ? RW ?