MMIO Interfaces
| Name
|
Physical address
|
| SceIftu0RegA (OLED FB)
|
0xE5020000
|
| SceIftu0RegB
|
0xE5021000
|
| SceIftuc0Reg
|
0xE5022000
|
| SceIftu1RegA (HDMI FB)
|
0xE5030000
|
| SceIftu1RegB
|
0xE5031000
|
| SceIftuc1Reg
|
0xE5032000
|
| SceIftu2Reg
|
0xE5040000
|
It looks like the display controller has 4 overlay planes (Iftu0RegA, Iftu0RegB, Iftu1RegA, Iftu0RegB) and 1 cursor plane (Iftu2Reg)?
Registers
IftuRegs
| Offset
|
Size
|
Description
|
| 0x004
|
4
|
bit 0 = attach to engine/CRTC of OLED/LCD, bit 1 attach to engine/CRTC of HDMI
|
| 0x090
|
4
|
Brightness value (or alpha?)
|
| 0x0A4
|
4
|
Control? (bit 0 = don't use the brightness value)
|
| 0x200 + n * 0x100 + 0x00
|
4
|
Physical address
|
| 0x200 + n * 0x100 + 0x04
|
4
|
Unknown
|
| 0x200 + n * 0x100 + 0x40
|
4
|
Pixelformat
|
| 0x200 + n * 0x100 + 0x44
|
4
|
Height
|
| 0x200 + n * 0x100 + 0x48
|
4
|
Width
|
| 0x200 + n * 0x100 + 0x54
|
4
|
Leftover stride
|
IftucRegs (control registers?)
| Offset
|
Size
|
Description
|
| 0x10
|
4
|
bit 0 = Enable Engine 0 (OLED/LCD) or Engine 1 (HDMI)
|