From Vita Development Wiki
Jump to navigation
Jump to search
MMIO Interfaces
Name
|
Physical address
|
SceSpi0Reg (SceSyscon)
|
0xE0A00000
|
SceSpi1Reg (SceMotionDev)
|
0xE0A10000
|
SceSpi2Reg (SceOled)
|
0xE0A20000
|
Registers
Offset
|
Size
|
Description
|
0x04
|
4
|
FIFO
|
0x10
|
4
|
Start transfer (write 0b1), cancel transfer(write 0b0), transfer busy (reads bit0 = 0)?
|
0x18
|
4
|
Start transfer (bit 0 or 1), transfer direction (bit 0 or 1)?
|
0x24
|
4
|
Flags?
|
0x28
|
4
|
Status? bit 0 = pending data to read from the FIFO
|
0x2C
|
4
|
Transfer length?
|