The main SoC is labeled <code>CXD5315GG</code>. The design is a stacked SoC with the SDRAM found in the same chip as the processor cores. Toshiba details their "[http://www.toshiba-components.com/ASIC/SiP.html Stacked Chip SOC]" on their site.
More information can be found at [http://www.chipworks.com/en/technical-competitive-analysis/resources/blog/sonys-ps-vita-uses-chip-on-chip-sip-3d-but-not-3d/ Chipworks].
According to the internal photos found in the [https://apps.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=712137&fcc_id=AK8PCH1101A FCC filings], it appears that an earlier version of the chip is labeled <code>T9ML7MBG-S</code>. This does not appear to be a standard model and is likely custom designed in partnership with Sony Computer Entertainment Japan. It is possible that Sony used [http://www.toshiba-components.com/ASIC/index.html this service] from Toshiba in their design process which is why the prototype demonstrated in the FCC filing shows a Toshiba chip..