SceKernelIntrMgr

SceKernelIntrMgr is a kernel module that is primary responsible for setting up external and internal interrupts. Notably, it facilitates communication with the Cmep processor.

Module
This module exists in both non-secure and secure world. The non-secure world SELF can be found in. It also can be found in the Boot Image (SKBL).

Libraries
This module only exports kernel libraries.

sceKernelReleaseIntrHandlerForDriver
This function first performs a disable and then removes the current interrupt handler associated with the interrupt.

sceKernelDisableIntrForDriver
This function writes  to the Interrupt Disable Registers (offset 0x180 from the Interrupt Distributor registers) at.

sceKernelEnableIntrForDriver
This function writes  to the Interrupt Enable Registers (offset 0x100 from the Interrupt Distributor registers) at.

sceKernelResumeIntrForDriver
Enables or disables an interrupt. If a  is passed to , it acts as sceKernelDisableIntrForDriver, and if a   is passed, it acts as sceKernelEnableIntrForDriver.

sceKernelSuspendIntrForDriver
This function returns whether the interrupt  is enabled or not. If it's enabled, a  will be written to   and a   otherwise. To check the enable status, the function checks the bit number  of the Interrupt Enable register (offset 0x100 from the Interrupt Distributor registers) at.

sceKernelSetIntrPriorityForDriver
This function writes  to the Interrupt Priority Registers (offset 0x400 from the Interrupt Distributor registers) at.

sceKernelSetIntrTargetCpuForDriver
This function writes the bits 0-8 or 16-24 of, depending on whether the mask is in former or the latter bits, to the Interrupt Processor Targets Registers (offset 0x800 from the Interrupt Distributor registers) at

sceKernelGenerateSoftIntrForDriver
This function triggers a SGI (software generated interrupt) by writing  to the Software Generated Interrupt Register (offset 0xF00 from the Interrupt Distributor registers, physical address 0x1A001F00). Note:  must be between   and.

sceKernelIsIntrContextForDriver
Indicates whether or not the thread is currently handling an interrupt.

Returns  if the current TPIDRPRW (PL1-only Thread ID Register, holds a pointer to the current ThreadCB) is non-NULL, or if an internal structure field is not set for the current CPU.

sceKernelCallSubIntrHandlerForDriver
Triggers a subinterrupt by directly calling it.

sceKernelEnableSubIntrForDriver
It also calls  of the registered   as:.

sceKernelDisableSubIntrForDriver
Calls  of the registered   as:.

sceKernelSuspendSubIntrForDriver
Calls  of the registered   as:.

invoke_callback_842B45DC
invoke callback that was set with 0x842B45DC

sceKernelEnableCoreIntr_SceIntrmgrForKernel_A60D79A4
Enables interrupts.

sceKernelGetIntrPendingStatusForDebuggerForKernel
This function returns whether the interrupt  is pending or not. If it's pending, a  will be returned, and a   will be returned otherwise. To check the pending status, the function checks the bit number  of the Interrupt Set-Pending Registers (offset 0x200 from the Interrupt Distributor registers) at.

sceKernelClearIntrPendingStatusForDebuggerForKernel
This function writes  to the Interrupt Clear-Pending Registers (offset 0x280 from the Interrupt Distributor registers) at.

sceKernelAllocSystemCallTableForKernel
Temp name was sceKernelAllocSyscallTableForKernel.

Calls sceKernelAllocPartitionMemBlockForKernel(0x10009, "SceSyscallTable", 0x1020D006, 4 * numSyscalls, 0).

0x10009 is the UID of the "SceKernelRoot" partition.

SceIntrmgrForKernel_01E5233E
Copy data to dst from src.

SceIntrmgrForKernel_37F4627B
Register sceKernelRegisterIntrHandler/sceKernelReleaseIntrHandler exit callback.

SceIntrmgrForKernel_4F611A63
Register irq complete callback.

SceIntrmgrForKernel_4F890B0C
Guessed name : sceKernelSetIrqDBGBVRSaveContext

SceIntrmgrForKernel_53DD3BF5
Register irq `setupNextContext_intr` function.

SceIntrmgrForKernel_772BE54F
Register irq `callThreadmgrBeforeIntrHandler` function.

SceIntrmgrForKernel_82ADA185
Register sceKernelTriggerSubIntr's enter/leave callback.

SceIntrmgrForKernel_842B45DC
Register svc invalid call (?) callback.

SceIntrmgrForKernel_89E47181
Guessed name : sceKernelSetIrqDBGWVRSaveContext

SceIntrmgrForKernel_8ED485C0
Like setjmp->longjmp

SceIntrmgrForKernel_CAAC949E
Set 16-bytes to global variable.

SceIntrmgrForKernel_EE4CE1DB
Like setjmp->setjmp

SceIntrmgrForKernel_EF1D3865
Return to SceInterruptControllerReg + 0x100 address

SceIntrmgrForKernel_F281330D
Guessed name : sceKernelGetIrqNestCB

get_intr_logs
Read Physical_Memory and writes logs to str_buf.

sceKernelRegisterMonitorCallHandlerForTZS
Register a SMC (secure only).

Controller
The interrupt controller is defined in the MPCore TRM. The PERIPHBASE address (physical) is 0x1A000000.

Registered Interrupts
As specified in the GIC Architecture Specification, interrupt IDs 0 to 15 are reserved for Software Generated Interrupts (SGIs), while interrupt IDs 16 to 31 are reserved for Private Peripheral Interrupts (PPIs). There are no private peripherals on the PS Vita so PPIs are unused.

It appears the PS Vita's GIC implements priority bits  i.e. it only supports 128 priority levels. This means all values in the  column should be divided by 2.

The  indicates the CPU(s) the exception can be signaled to - "All" means it can be signaled to any CPU and  -prefixed values are masks.

Secure Interrupts
Those interrupts are marked as Secure using the GIC's ICDISR by SKBL. It also marks interrupts 96-111 as Secure; however, those IDs have never been seen in use. All other interrupts are marked as Non-Secure.

Registered Subinterrupts
Non-secure