Hardware Timers

The PSVita system embeds 8 Word timers ( to  ) and 6 Longrange timers (  to  ). The timers consist of a counter that gets incremented at a configurable time interval (multiple of a base frequency?), and can generate an interrupt when a certain value is reached.

Most timers are managed by SceSystimer.

Available timers
The  column indicates the physical address at which the interface for a timer is located.

Each timer interface takes 0x1000 bytes.

Misc Reg
Miscellaneous features related to all timers can be accessed from an interface at physical address.

Word Timers
Timers with 32-bit counters, unknown base frequency (seems to be in the order of ns).

Long Timers
Timers with 64-bit counters, estimated tick period: 5.285ns±0.2ns (~189MHz±2MHz).

SceLT5 timer is configured to increment every microsecond (1MHz frequency).

NOTE: On ARMv7 processors that do not support the Large Physical Address Extension, such as the PS Vita's CPU, 64-bit accesses are not guaranteed to be atomic.

This can lead to issues when reading the timer if the low word of a counter is about to overflow.

To ensure the readings from a timer are accurate, use code similar to the following code:

Configuration register
The configuration register bit mappings seems to be identical for Word and Long timers.