SGX543

Instruction set
It looks like instructions are 8 bytes long. Roughly speaking - first 4 bytes contain opcode and addressing mode. Second 4 bytes contain operands encoding.

Bit encoding used in this reference:

Predicates:

Not sure about predicates yet, but they are used to mask execution of certain instructions.

Notation is the following:

For example:

To reduce amount of examples - they are not listed with predicates.

It is assumed that all predicates are applicable to all instructions in the group unless opposite is indicated.

Modifier and dest data format:

At the moment it is not known which of the data format fields is dest and which is source.

This is the reason why term modifier is mixed with term dest data format.

0x00000000 - 0x08000000
Instructions: mad

Encoding:

{|
 * - style="vertical-align:top;"


 * }
 * }

Fields:

Examples:

0x08000000 - 0x10000000
Instructions: mul.f32

Encoding:

{|
 * - style="vertical-align:top;"


 * }
 * }

Fields:

predicate:

Examples:

0x10000000 - 0x18000000
Instructions: mul.f16

Encoding:

{|
 * - style="vertical-align:top;"


 * }
 * }

Fields:

predicate:

Examples:

0x18000000 - 0x20000000
Instructions: dot.f32, mad.f32

Encoding:

Fields:

Examples:

0x20000000 - 0x28000000
Instructions: dot, mov, rsq, rcp, exp, log

Encoding:

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

opcode2 (depends on op_sel):

Examples:

0x28000000 - 0x30000000
Instructions: dot, mov, rsq, rcp

Encoding:

Notes:

Having bit 3 in byte 2 set to 0 produces invalid instruction

Fields:

opcode2:

Examples:

0x30000000 - 0x38000000
Instructions: rcp, rsq, log, exp

Encoding:

Notes:

should be omitted if  matches.

Fields:

Examples:

0x38000000 - 0x40000000
Instructions: mov, cmov, cmov8

Encoding:

Notes:

is only applicable to  and   since this is conditional move.

Fields:

Examples:

0x40000000 - 0x48000000
Instructions: pack, (mov)

Encoding:

Notes:

when  matches   it shall be omitted since it has no effect in terms of packing.

furthermore instruction mnemonic shall be replaced to

Fields:

Examples:

0x48000000 - 0x50000000
Instructions: this group only contains illegal instructions

Encoding:

{|
 * - style="vertical-align:top;"


 * }
 * }

0x50000000 - 0x58000000
Instructions: and.u32

Encoding:

{|
 * - style="vertical-align:top;"


 * }
 * }

0x58000000 - 0x60000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x60000000 - 0x68000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x68000000 - 0x70000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x70000000 - 0x78000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x78000000 - 0x80000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x80000000 - 0x88000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x88000000 - 0x90000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x90000000 - 0x98000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0x98000000 - 0xA0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xA0000000 - 0xA8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xA8000000 - 0xB0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xB0000000 - 0xB8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xB8000000 - 0xC0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xC0000000 - 0xC8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xC8000000 - 0xD0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xD0000000 - 0xD8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xD8000000 - 0xE0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xE0000000 - 0xE8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xE8000000 - 0xF0000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xF0000000 - 0xF8000000
{|
 * - style="vertical-align:top;"


 * }
 * }

0xF8000000 - 0xFF000000
{|
 * - style="vertical-align:top;"


 * }
 * }