MediaWiki API result

{
    "batchcomplete": "",
    "continue": {
        "gapcontinue": "SCECAF",
        "continue": "gapcontinue||"
    },
    "warnings": {
        "main": {
            "*": "Subscribe to the mediawiki-api-announce mailing list at <https://lists.wikimedia.org/mailman/listinfo/mediawiki-api-announce> for notice of API deprecations and breaking changes."
        },
        "revisions": {
            "*": "Because \"rvslots\" was not specified, a legacy format has been used for the output. This format is deprecated, and in the future the new format will always be used."
        }
    },
    "query": {
        "pages": {
            "439": {
                "pageid": 439,
                "ns": 0,
                "title": "ReadAs",
                "revisions": [
                    {
                        "contentformat": "text/x-wiki",
                        "contentmodel": "wikitext",
                        "*": "ReadAs is a functionality provided by an unknown device.\n\nIt can be used to read/write data anywhere on the mapped memory. It is suspected to be a DMAC4 interface.\n\nIt is never accessed by any currently reverse-engineered code and is not referenced in any accessible memory map.\n\n== Configuration registers for cmep ==\n\n{| class=\"wikitable\"\n|-\n! Register !! Description\n|-\n| 0xE0020040 || Address\n|-\n| 0xE0020044 || Data (in/out)\n|-\n| 0xE0020048 || Mode\n|}\n\n== Modes ==\n\nMode is a bitfield. You can enable/disable some readAs features as well as change the used DMAC channel.\n\n{| class=\"wikitable\"\n|-\n! Bit !! Description\n|-\n| 0 || Write data to address\n|-\n| 1 || Mode 2 - Alternative Secure?\n|-\n| 2 || Mode 4 - Non-secure?\n|-\n| 3 || Read/Write address byte 0\n|-\n| 4 || Read/Write address byte 1 and allow non-0x10-aligned address read\n|-\n| 5 || Read/Write address byte 2\n|-\n| 6 || Read/Write address byte 3\n|-\n| 30 || ?? hangs with bits 0 and 2\n|}\n\nWhile write mode always respects bits 3-6, read mode seems to have a set of address ranges that always read all 4 bytes.\n\n== Usage example ==\n\n<source lang=\"C\">\n#define READAS_REG 0xE0020040 // readas32 device\n\n#define READAS_DEV_S 0 // default secure\n#define READAS_MODE_WRITE 0b1 // write mode\n#define READAS_DEV_UNK 0b10 // masks DRAM and DRAM regs, from ARM bus\n#define READAS_DEV_NS 0b100 // non-secure\n\n// below options only apply to write mode and some offsets in read mode\n#define READAS_B0 0b1000\n#define READAS_B1 0b10000 // or READAS_NOALIGN in incompatible read offsets\n#define READAS_B2 0b100000\n#define READAS_B3 0b1000000\n#define READAS_32 (READAS_B0 | READAS_B1 | READAS_B2 | READAS_B3)\n\ntypedef struct {\n    unsigned int addr;\n    unsigned int resp;\n    unsigned int mode;\n} __attribute__((packed)) e002_readas32;\n\nstatic volatile e002_readas32* const READAS32 = (void*)READAS_REG;\n\n// read from [addr] with mode [mode]\nstatic u32_t readAs(u32_t addr, u32_t mode) {\n    READAS32->addr = addr;\n    READAS32->resp = 0xDEADBABE;\n    READAS32->mode = mode;\n    while (READAS32->resp == 0xDEADBABE) {} // wait until READAS replies\n    return READAS32->resp;\n}\n\n// write to [addr] with mode [mode]\nstatic void writeAs(u32_t addr, u32_t data, u32_t mode) {\n    READAS32->addr = addr;\n    READAS32->resp = data;\n    READAS32->mode = mode | READAS_MODE_WRITE;\n}\n</source>\n\n== Ranges ==\n\nResults after a full memcmp:\n\n<pre>\n- mode 0 vs normal cmep read\n--not available in mode 0:\n0x00300000-0x00400000\n0xE0000000-0xE0040000\n0xE0058000-0xE0068000\n0xE00C0000-0xE00D0000\n0xE0100000-0xE0101000\n0xE04D0000-0xE04DC000\n0xE20A0000-0xE20B0000\n0xE20C0000-0xE20D0000\n0xE3110000-0xE3120000\n0xE8000000-0xE8400000\n\n- mode 2 vs 0\n--not available in mode 2:\n0x40000000-0xC0000000\n0xE0400000-0xE0420000\n0xE04E0000-0xE04E1000\n0xE3000000-0xE3020000\n0xE3101000-0xE3104000\n0xE5000000-0xE5020000\n0xE50C0000-0xE50D0000\n0xE5880000-0xE6010000\n0xEC340000-0xEC370000\n0xED948000-0xED970000\n\n- mode 4 vs mode 0\n--not available in mode 0 (!)\n0x00000000-0x00008000\n0xE0100000-0xE0101000\n0xE04D0000-0xE04DC000\n0xE20A0000-0xE20B0000\n0xE3110000-0xE3120000\n--not available in mode 4:\n0x00040000-0x00060000\n0x00800000-0x00820000\n0xE0000000-0xE0100000\n0xEC000000-0xEE700000\n</pre>\n\n== Notes ==\n\n* On SoC v3.2+ all read modes can be disabled by writing 0x420 to physical address 0xE0010010.\n* This cmep device has been updated in PS Vita SoC rev 4 compared to rev 3.2. When cmep is reset the configuration is zeroed (both in type 1 and type 8 cmep reset).\n\n[[Category:MMIO]]"
                    }
                ]
            },
            "422": {
                "pageid": 422,
                "ns": 0,
                "title": "Robin",
                "revisions": [
                    {
                        "contentformat": "text/x-wiki",
                        "contentmodel": "wikitext",
                        "*": "Robin is the condename of the Wireless LAN and Bluetooth card contained in the PS Vita.\n\n= Hardware =\n\nMarvell 88W878S-BKB2 is the chip used in the PS Vita OLED (PCH-1XXX) to support Wi-Fi/Bluetooth. It has a Marvell SD8787 based wifi module. It might share some similarities with Marvell Avastar 88W8787. It is connected to ?[[Kermit]] or [[Ernie]]? through SDIO interface.\n\n= Firmware =\n\nSee [[SceWlanBt]], [[SceWlanBtRobinImageAx]] and [[SceSdif]].\n\nAn open-source linux driver for Marvell SD8787 is named mwifiex and can be found at\n[https://github.com/boundarydevices/linux/tree/boundary-imx_3.0.35_4.0.0/drivers/net/wireless/mwifiex].\n\n* Robin firmware uses ARMv5TE processor architecture.\n* Robin firmware image is stored in wlanbt_robin_img_ax.skprx starting at offset 305 on System Software version 3.600.011.\n\n= Resources =\n\n* Marvell 88W8787 Overview & doc: [[File:Marvell_Avastar_88W8787_SoC.pdf]]\n* Marvell 88W8787 Engineering specs: [[File:Marvell_88W8787_engineering_specifications_\u2014_Foxconn_for_Sony.pdf]]\n* Linux drivers: https://wikidevi.wi-cat.ru/Mwifiex#Drivers\n* Chromium OS source: https://chromium.googlesource.com/chromiumos/third_party/marvell/+/854d5b47fe714bbf42dfb495b9af5f3893ca5530\n\n= Speed =\n\nMarvell SD8787 supports up to 150 Mbps for IEEE 802.11n, so the speed of PS Vita's 88W878S-BKB2 is probably severely nerfed. It is not sure yet whether the speed limitation comes from the OS through some commands, or the firmware itself.\n\n[[Category:Devices]]"
                    }
                ]
            }
        }
    }
}