Difference between revisions of "SKBL"
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Line 29: | Line 29: | ||
<source lang="C">int sceKernelUidRelease(SceUID uid);</source> | <source lang="C">int sceKernelUidRelease(SceUID uid);</source> | ||
− | === | + | === sceKernelIsColdBoot === |
{| class="wikitable" | {| class="wikitable" | ||
Line 50: | Line 50: | ||
<source lang="C">void *memset(void *dst, int ch, int len);</source> | <source lang="C">void *memset(void *dst, int ch, int len);</source> | ||
+ | |||
+ | === sceKernelCpuDcacheCleanMVACRange === | ||
+ | {| class="wikitable" | ||
+ | |- | ||
+ | ! Version !! offset !! mode | ||
+ | |- | ||
+ | | 3.60 || 0x1650C || thumb | ||
+ | |} | ||
+ | |||
+ | <source lang="C">void sceKernelCpuDcacheCleanMVACRange(void *addr, unsigned int size);</source> | ||
=== sceKernelDcacheWritebackInvalidateRange === | === sceKernelDcacheWritebackInvalidateRange === | ||
Line 63: | Line 73: | ||
<source lang="C"> | <source lang="C"> | ||
// DCCIMVAC, Data cache clean and invalidate by MVA (PoC) | // DCCIMVAC, Data cache clean and invalidate by MVA (PoC) | ||
− | void | + | void sceKernelDcacheWritebackInvalidateRange(const void *addr, unsigned int size); |
</source> | </source> | ||
Revision as of 13:28, 28 March 2021
Common
These functions are at different offsets than those of SceTzs modules.
Offsets are relative to SKBL text segment base address. See Secure DRAM.
SceSysmem
sceGUIDReferObjectWithClass
Version | offset | mode |
---|---|---|
3.60 | 0x9DF8 | thumb |
int sceGUIDReferObjectWithClass(SceUID uid, SceClass *pClass, SceKernelObject **ppEntry);
sceKernelUidRelease
Version | offset | mode |
---|---|---|
3.60 | 0x9E60 | thumb |
int sceKernelUidRelease(SceUID uid);
sceKernelIsColdBoot
Version | offset | mode |
---|---|---|
3.60 | 0x14904 | thumb |
int sceKernelIsColdBoot(void);
memset
Version | offset | mode |
---|---|---|
3.60 | 0x15A30 | thumb |
void *memset(void *dst, int ch, int len);
sceKernelCpuDcacheCleanMVACRange
Version | offset | mode |
---|---|---|
3.60 | 0x1650C | thumb |
void sceKernelCpuDcacheCleanMVACRange(void *addr, unsigned int size);
sceKernelDcacheWritebackInvalidateRange
Version | offset | mode |
---|---|---|
3.60 | 0x1652C | thumb |
Temp name was sceKernelCpuDcacheCleanInvalidateMVACRangeForKernel, sceKernelCpuDcacheWritebackInvalidateRangeForKernel.
// DCCIMVAC, Data cache clean and invalidate by MVA (PoC)
void sceKernelDcacheWritebackInvalidateRange(const void *addr, unsigned int size);
sceKernelCpuGetPaddr
Version | offset | mode |
---|---|---|
3.60 | 0x179E0 | thumb |
int sceKernelCpuGetPaddr(void *VA,uintptr_t *pPA);
SceKernelModulemgr
get_module_object
Version | offset | mode |
---|---|---|
3.60 | 0x2350 | thumb |
SceModuleObject *get_module_object(SceUID modid);
get_module_bootstart
Version | offset | mode |
---|---|---|
3.60 | 0x2744 | thumb |
int get_module_bootstart(SceUID modid, void *entry);
sceKernelLoadModuleWithBuffer
Version | offset | mode |
---|---|---|
3.60 | 0x2494 | thumb |
SceUID sceKernelLoadModuleWithBuffer(const void *pModule, SceSize size);
sceKernelStartModule
Version | offset | mode |
---|---|---|
3.60 | 0x2710 | thumb |
int sceKernelStartModule(SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);
sceKernelStartModuleForPid
Version | offset | mode |
---|---|---|
3.60 | 0x25BC | thumb |
int sceKernelStartModuleForPid(SceUID pid, SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);
sceKernelLoadStartModule
Version | offset | mode |
---|---|---|
3.60 | 0x20B0 | thumb |
typedef struct SceTzsModule {
const void *pModule;
const void *pModuleEnd;
} SceTzsModule;
int sceKernelLoadStartModule(SceTzsModule *pModule, void *argp);