Difference between revisions of "GPIO Registers"
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| Line 42: | Line 42: | ||
| 4 | | 4 | ||
| [[GPIO_Registers#Interrupt mode bits|Interrupt mode]] (2 bits each port) for interrupts 16-31 | | [[GPIO_Registers#Interrupt mode bits|Interrupt mode]] (2 bits each port) for interrupts 16-31 | ||
| + | |- | ||
| + | | 0x1C | ||
| + | | 4 | ||
| + | | Gate 0 interrupts enable (1 bit each port) | ||
| + | |- | ||
| + | | 0x20 | ||
| + | | 4 | ||
| + | | Gate 1 interrupts enable (1 bit each port) | ||
| + | |- | ||
| + | | 0x24 | ||
| + | | 4 | ||
| + | | Gate 2 interrupts enable (1 bit each port) | ||
| + | |- | ||
| + | | 0x2C | ||
| + | | 4 | ||
| + | | Gate 3 interrupts enable (1 bit each port) | ||
| + | |- | ||
| + | | 0x30 | ||
| + | | 4 | ||
| + | | Gate 4 interrupts enable (1 bit each port) | ||
|- | |- | ||
| 0x34 | | 0x34 | ||
Revision as of 08:05, 27 May 2021
MMIO Interfaces
| Name | Physical address |
|---|---|
| SceGpio0Reg | 0xE20A0000 |
| SceGpio1Reg | 0xE0100000 |
Registers
| Offset | Size | Description |
|---|---|---|
| 0x00 | 4 | Port mode (1=out, 0=in) (1 bit each port) |
| 0x04 | 4 | Port read (1=low, 0=high?) (1 bit each port) |
| 0x08 | 4 | Port set (1 bit each port) |
| 0x0C | 4 | Port clear (1 bit each port) |
| 0x14 | 4 | Interrupt mode (2 bits each port) for interrupts 0-15 |
| 0x18 | 4 | Interrupt mode (2 bits each port) for interrupts 16-31 |
| 0x1C | 4 | Gate 0 interrupts enable (1 bit each port) |
| 0x20 | 4 | Gate 1 interrupts enable (1 bit each port) |
| 0x24 | 4 | Gate 2 interrupts enable (1 bit each port) |
| 0x2C | 4 | Gate 3 interrupts enable (1 bit each port) |
| 0x30 | 4 | Gate 4 interrupts enable (1 bit each port) |
| 0x34 | 4 | Port read latched? (1=low, 0=high?) (1 bit each port) |
| 0x38 | 4 | Interrupt status/clear (1 bit each port) |
| 0x3C | 4 | Interrupt status/clear (1 bit each port) |
| 0x40 | 4 | Interrupt status/clear (1 bit each port) |
| 0x44 | 4 | Interrupt status/clear (1 bit each port) |
| 0x48 | 4 | Interrupt status/clear? (1 bit each port) |
Interrupt mode bits
| Value | Mode |
|---|---|
| 0 | High level-sensing mode |
| 1 | Low level-sensing mode |
| 2 | Rising edge detection mode |
| 3 | Falling edge detection mode |
It seems each of the 5 Interrupt enable/clear registers correspond to the 5 GpioGate[i] Interrupt IDs in Interrupts#Registered_Interrupts.
GPIO Bus 0 ports
| Port | Description |
|---|---|
| 0 | OLED/LCD |
| 1 | unk |
| 2 | unk |
| 3 | Syscon related (output) |
| 4 | Syscon related (input) |
| 5 | UDCD (USB Device Controller Driver) related |
| 6 | Game Card reader LED |
| 7 | PS Button Blue LED (only blue ?? no red?) |
| 8 | unk |
| 9 | Camera |
| 10 | unk. Used in 0.996 SceEnumWakeUp. |
| 11 | unk. Used in 0.996 SceEnumWakeUp. |
| 12 | UDCD (USB Device Controller Driver) related |
| 13 | HDMI related (input) |
| 14 | unk |
| 15 | HDMI related (output) |
| 16 | GPO 0 (General Purpose Output - DevKit LED 0) |
| 17 | GPO 1 (General Purpose Output - DevKit LED 1) |
| 18 | GPO 2 (General Purpose Output - DevKit LED 2) |
| 19 | GPO 3 (General Purpose Output - DevKit LED 3) |
| 20 | GPO 4 (General Purpose Output - DevKit LED 4) |
| 21 | GPO 5 (General Purpose Output - DevKit LED 5) |
| 22 | GPO 6 (General Purpose Output - DevKit LED 6) |
| 23 | GPO 7 (General Purpose Output - DevKit LED 7) |
| 24 | UDCD (USB Device Controller Driver) related |
| 25 | unk |
| 26 | unk |
| 27 | Motion related |
| 28 | Motion related |
| 29 | SDIF related |
| 30 | 3G Modem related |
| 31 | unk |
GPIO Bus 1 ports
| Port | Description |
|---|---|
| 7 | LCD related. Backlight? |
Interrupt mode used by PSVita OS
| Bus | Port | Interrupt mode | Description |
|---|---|---|---|
| 0 | 4 | 3 | Syscon input |