PSP Emulator

From Vita Development Wiki

PSP Memory Layout

Address Size Comments
0x00010000 0x4000 CPU Scratchpad
0x04000000 2 MB/4 MB VRAM/Framebuffer
0x08000000 64 MB Main Memory
0xBC300000 0x1000? Interrupt manager. Used for MIPS <-> Kermit (ARM) communication
0xBD000000 0x1000? System control
0xBE140000 0xC0000 LCDC
0xBFC00000 0x1000 Shared SRAM. Mapped to 0xE8100000 on ARM side

Registers

Interrupt manager

Address Size Comments
0xBC300030 4 Interrupt pending and ack/clear, 1 bit each
0xBC300038 4 Interrupt enable/mask, 1 bit each
0xBC300040 4 Interrupt mode for IRQs 0-15, 2 bits each
0xBC300044 4 Interrupt priority for IRQs 0-15, 2 bits each
0xBC300048 4 Interrupt mode for IRQs 16-31, 2 bits each
0xBC30004C 4 Interrupt priority for IRQs 16-32, 2 bits each
0xBC300050 4 Interrupt raise, 1 bit each. Raises SceCompatN ARM interrupt

System control

Address Size Comments
0xBD000000 4 ??
0xBD000004 4 ??

SceGrab

Address Size Comments
0xE8300120 4 Paddr of CDRAM base + 1, maps to 0x88000000?
0xE8300124 4 Paddr of CDRAM base + 0x1000000 + 1
0xE8300128 4 Paddr of CDRAM base + 0x2000000 + 1
0xE830012C 4 Paddr of flash0 in CDRAM (base + 0x3000000) + 1, maps to 0x3000000?

SceCompatLCDDMA

Address Size Comments
0xE5071004 4 set 1 when done
0xE5071024 4 0xFF0000
0xE5071028 4 0x0
0xE5071030 4 some status
0xE5071034 4 Width pixels
0xE5071038 4 0x0
0xE507103C 4 Hight pixels
0xE5071040 4 0x0
0xE507104C 4 DMA Paddr
0xE5071078 4 0x0
0xE5071084 4 0x0
0xE5071050 4 2048
0xE5071094 4 2
0xE5071098 4 1
0xE50710C0 4 busy status? (set 0x1000000 when done)