Revision as of 20:45, 23 January 2022

Changelog

FW version	What changed compared to previous FW version
3.36	unknown
3.50	Initial stack base changed (+ 0x100). Something in the function has changed. (See func, 3.50:0x40020438) Removed some register writing. (See func, 3.36:0x4002066c/3.50:0x40020668)

Common

These functions are at different offsets than those of SceTzs modules.

Offsets are relative to SKBL text segment base address. See Secure DRAM.

SceKernelModulemgr

sceKernelLoadStartModule

Version	offset	mode
3.60	0x20B0	thumb

typedef struct SceTzsModule {
	const void *pModule;
	const void *pModuleEnd;
} SceTzsModule;

int sceKernelLoadStartModule(SceTzsModule *pModule, void *argp);

get_module_object

Version	offset	mode
3.60	0x2350	thumb

SceModuleObject *get_module_object(SceUID modid);

sceKernelLoadModuleWithBuffer

Version	offset	mode
3.60	0x2494	thumb

SceUID sceKernelLoadModuleWithBuffer(const void *pModule, SceSize size);

sceKernelStartModuleForPid

Version	offset	mode
3.60	0x25BC	thumb

int sceKernelStartModuleForPid(SceUID pid, SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);

sceKernelStartModule

Version	offset	mode
3.60	0x2710	thumb

int sceKernelStartModule(SceUID modid, SceSize args, void *argp, int flags, SceKernelLMOption *option, int *status);

get_module_bootstart

Version	offset	mode
3.60	0x2744	thumb

int get_module_bootstart(SceUID modid, void *entry);

print_module_load_info

Version	offset	mode
3.60	0x2A70	thumb

resolve_import_function

Version	offset	mode
3.60	0x4748	thumb

SceExcpmgr

excp_handler

Version	offset	mode
3.60	0x4A3C	thumb

sceExcpmgrRegisterHandler

Version	offset	mode
3.60	0x4A70	thumb

SceExcpmgr_module_start

Version	offset	mode
3.60	0x4CB4	thumb

SceSysmem

SceSysmem_NS_0x8100156C

Version	offset	mode
3.60	0x6EC0	thumb

sceGUIDReferObjectWithClass

Version	offset	mode
3.60	0x9DF8	thumb

int sceGUIDReferObjectWithClass(SceUID uid, SceClass *pClass, SceKernelObject **ppEntry);

sceKernelUidRelease

Version	offset	mode
3.60	0x9E60	thumb

int sceKernelUidRelease(SceUID uid);

sceKernelIsColdBoot

Version	offset	mode
3.60	0x14904	thumb

int sceKernelIsColdBoot(void);

memcpy

Version	offset	mode
3.60	0x15920	thumb

void *memcpy(void *dst, const void *src, int len);

memset

Version	offset	mode
3.60	0x15A30	thumb

void *memset(void *dst, int ch, int len);

sceKernelCpuIcacheInvalidateAll

Version	offset	mode
3.60	0x16480	thumb

void sceKernelCpuIcacheInvalidateAll(void);

sceKernelCpuIcacheInvalidateMVAURange

Version	offset	mode
3.60	0x164A0	thumb

void sceKernelCpuIcacheInvalidateMVAURange(void *start, SceSize size);

sceKernelCpuDcacheCleanMVACRange

Version	offset	mode
3.60	0x1650C	thumb

void sceKernelCpuDcacheCleanMVACRange(void *addr, unsigned int size);

sceKernelDcacheWritebackInvalidateRange

Version	offset	mode
3.60	0x1652C	thumb

Temp name was sceKernelCpuDcacheCleanInvalidateMVACRangeForKernel, sceKernelCpuDcacheWritebackInvalidateRangeForKernel.

// DCCIMVAC, Data cache clean and invalidate by MVA (PoC)
void sceKernelDcacheWritebackInvalidateRange(const void *addr, unsigned int size);

sceKernelCorelockContextInitialize

Version	offset	mode
3.60	0x16A80	thumb

typedef struct SceCorelockContext {
	int lock;
	int16_t core_count;
	int16_t last_wait_core; // 0:core3, 1:core0, 2:core1, 3:core2
} SceCorelockContext;

void sceKernelCorelockContextInitialize(SceCorelockContext *ctx);

sceKernelCorelockLock

Version	offset	mode
3.60	0x16A8C	thumb

void sceKernelCorelockLock(SceCorelockContext *ctx, int core);

sceKernelCorelockUnlock

Version	offset	mode
3.60	0x16AC0	thumb

void sceKernelCorelockUnlock(SceCorelockContext *ctx);

sceKernelDcacheCleanRange_0x20

Version	offset	mode
3.60	0x16E54	thumb

int sceKernelDcacheCleanRange_0x20(const void *start, SceSize size);

sceKernelDcacheCleanRange_0x1

Version	offset	mode
3.60	0x16E60	thumb

int sceKernelDcacheCleanRange_0x1(const void *start, SceSize size);

sceKernelCpuUnrestrictedMemcpy

Version	offset	mode
3.60	0x16E90	thumb

int sceKernelCpuUnrestrictedMemcpy(void *dst, const void *src, SceSize len);

sceKernelCpuGetPaddr

Version	offset	mode
3.60	0x179E0	thumb

int sceKernelCpuGetPaddr(void *VA, uintptr_t *pPA);

SceSkbl

sceArlzDecode

Version	offset	mode
0.990	?	?

Decodes an ARZL encoded buffer stored at src, of size size and writes result to dst. Returns written size.

SceSize sceArlzDecode(const void *dst, SceSize size, const void *src);

sceArlzArmFilter

Version	offset	mode
0.990	?	?

Returns actual size of decoded ARZL data coming from #sceArlzDecode.

SceSize sceArlzArmFilter(const void *addr, SceSize size);

arzl_decompress

Version	offset	mode
3.60	0x183A8	arm

@@ Line 329: / Line 329: @@
 == SceSkbl ==
+=== sceArlzDecode ===
+{| class="wikitable"
+|-
+! Version !! offset !! mode
+|-
+| 0.990 || ? || ?
+|}
+Decodes an [[ARZL]] encoded buffer stored at <code>src</code>, of size <code>size</code> and writes result to <code>dst</code>. Returns written size.
+<source lang="C">SceSize sceArlzDecode(const void *dst, SceSize size, const void *src);</source>
+=== sceArlzArmFilter ===
+{| class="wikitable"
+|-
+! Version !! offset !! mode
+|-
+| 0.990 || ? || ?
+|}
+Returns actual size of decoded [[ARZL]] data coming from [[#sceArlzDecode]].
+<source lang="C">SceSize sceArlzArmFilter(const void *addr, SceSize size);</source>
 === arzl_decompress ===

Difference between revisions of "SKBL"