UART Registers

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MMIO Interfaces

Name Physical address Size
SceUartReg 0xE2030000 0x70000
SceUartClkgenReg 0xE3105000 0x1000

It looks like there are 7 UART devices/ports. The i-th device has its base registers address at SceUartReg + i * 0x10000.

The clock generation configuration for each of these devices is at SceUartClkgenReg + i * 4.

SceUartReg registers

Offset Size Description
0x68 4 Read FIFO data available
0x78 4 Read FIFO

Read FIFO data available

Bit(s) Description
0-5 Number of words available to read
6-31 Unused