SDIF Registers

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MMIO Interfaces

Name Physical Address
SceSdif0 (MMC) 0xE0B00000
SceSdif1 (SD/GC) 0xE0C00000
SceSdif2 (Wlan/Bt) 0xE0C10000
SceSdif3 (UNK) 0xE0C20000


Offset Size Name Comment
0x00 0x4 SDMA System Address / Argument 2
0x04 0x2 Block Size
0x06 0x2 Block Count
0x08 0x4 Argument 1
0x0C 0x2 Transfer Mode Bootrom is seen to use Reserved bits
0x0E 0x2 Command
0x10 0x2 Response0
0x12 0x2 Response1
0x14 0x2 Response2
0x16 0x2 Response3
0x18 0x2 Response4
0x1A 0x2 Response5
0x1C 0x2 Response6
0x1E 0x2 Response7
0x20 0x4 Buffer Data Port
0x24 0x4 Present State
0x28 0x1 Host Control 1
0x29 0x1 Power Control
0x2A 0x1 Block Gap Control
0x2B 0x1 Wakeup Control
0x2C 0x2 Clock Control
0x2E 0x1 Timeout Control
0x2F 0x1 Software Reset
0x30 0x2 Normal Interrupt Status
0x32 0x2 Error Interrupt Status
0x34 0x2 Normal Interrupt Status Enable
0x36 0x2 Error Interrupt Status Enable
0x38 0x2 Normal Interrupt Signal Enable
0x3A 0x2 Error Interrupt Signal Enable
0x3C 0x2 Auto CMD Error Status
0x3E 0x2 Host Control 2
0x40 0x8 Capabilities
0x48 0x8 Maximum Current Capabilities
0x50 0x2 Force Event for Auto CMD Error Status
0x52 0x2 Force Event for Error Interrupt Status
0x54 0x1 ADMA Error Status
0x55 0x3 UNUSED
0x58 0x8 ADMA System Address
0x60 0x2 Preset Value for Initialization
0x62 0x2 Preset Value for Default Speed
0x64 0x2 Preset Value for High Speed
0x66 0x2 Preset Value for SDR12
0x68 0x2 Preset Value for SDR25
0x6A 0x2 Preset Value for SDR50
0x6C 0x2 Preset Value for SDR104
0x6E 0x2 Preset Value for DDR50
0x70 0x70 UNUSED
0xE0 0x4 Shared Bus Control
0xE4 0x18 UNUSED
0xFC 0x2 Slot Interrupt Status
0xFE 0x2 Host Controller Version Reads as 0x8901 (SDHCI Spec 2.0, vendor 0x89) on a PSTV.


All registers are the same as defined in the SD Specifications Part A2: