From Vita Development Wiki
Jump to: navigation, search



Known NIDs

Version Name World Privilege NID
1.69 SceLowio Non-secure Kernel 0x19E0E42F
3.65 SceLowio Non-secure Kernel 0xEE520DFD


Known NIDs

Version Name World Visibility NID
1.69 ScePervasiveForDriver Non-secure Kernel 0xE692C727
1.69 SceGpioForDriver Non-secure Kernel 0xF0EF5743
1.69 ScePwmForDriver Non-secure Kernel 0xECEAE2D0
1.69 SceI2cForDriver Non-secure Kernel 0xE14BEF6E
1.69 SceGrabForDriver Non-secure Kernel 0x81C54BED
1.69 SceCdramForDriver Non-secure Kernel 0xC8CD941E
1.69 SceDsiForDriver Non-secure Kernel 0xEC897883
1.69 SceIftuForDriver Non-secure Kernel 0xCAFCFE50
1.69 SceCsiForDriver Non-secure Kernel 0xD85C8E44



Version NID
3.60 0x18DD8043

Turns off the clock (&= ~mask) of the device (UART) at offset 0x120 + 4 * device with mask = 1.

int ScePervasiveForDriver_18DD8043(int uart_bus);


Version NID
3.60 0x243D0E78
int ScePervasiveForDriver_243D0E78_get_dsi_clock_info(int pixelclock, int info0[2], int info1[2]);


Version NID
3.60 0x25AE181E
int ScePervasiveForDriver_25AE181E_dsi_clock_disable(int bus, int value);


Version NID
3.60 0x2F195C97

Turns on the clock (|= mask) of the device (GPIO) at offset 0x100 with mask = 1.

int ScePervasiveForDriver_2F195C97(void);


Version NID
3.60 0x551EEE82
int scePervasiveRemovableMemoryGetCardInsertStateForDriver(void);


Version NID
3.60 0x64ABE589
int ScePervasiveForDriver_64ABE589_msif_clock(int clock);


Version NID
3.60 0x731A097D

Puts the device (GPIO) at offset 0x100 in reset (|= mask) with mask = 1.

int ScePervasiveForDriver_731A097D(void);


Version NID
3.60 0x788B6C61

Puts the device (UART) at offset 0x120 + 4 * device in reset (|= mask) with mask = 1.

int ScePervasiveForDriver_788B6C61(int uart_bus);


Version NID
3.60 0x78C34032

Puts the device at offset 0x100 (GPIO) out of reset (&= ~mask) with mask = 1.

int ScePervasiveForDriver_78C34032(void);


Version NID
3.60 0x7B16F900

Puts the device (SPI) at offset 0x104 + 4 * device in reset (|= mask) with mask = 1.

int ScePervasiveForDriver_7B16F900(int device);


Version NID
3.60 0x81A155F1

Returns the SceLowio's mapped ScePervasiveMisc virtual address.

void *ScePervasiveForDriver_81A155F1(void);


Version NID
3.60 0x8BAB45F8

Changes UART baudrate. (There are 7 UART devices). Check SceUartClkgenReg. for more info.

int ScePervasiveForDriver_8BAB45F8(int uart_device, int baudrate);


Version NID
3.60 0x91C80C41
int ScePervasiveForDriver_91C80C41_set_dsi_bus_pixelclock(int bus, int pixelclock);


Version NID
3.60 0x8A85E36B

Puts the device at offset 0x10 (? GpuEs4 related (Secure)) out of reset (&= ~mask) with mask = 1.

int ScePervasiveForDriver_8A85E36B(void);


Version NID
3.60 0xA7CE7DCC

Puts the device (UART) at offset 0x120 + 4 * device out of reset (&= ~mask) with mask = 1.

int ScePervasiveForDriver_A7CE7DCC(int uart_bus);


Version NID
3.60 0xA7E64C6F

Puts the device at offset 0x30 (Venezia) out of reset (&= ~mask) with mask = 1.

int ScePervasiveForDriver_A7E64C6F(void);


Version NID
3.60 0xA85BF98A

Turns off the clock (&= ~mask) of the device (SPI) at offset 0x120 + 4 * device with mask = 1.

int ScePervasiveForDriver_A85BF98A(int device);


Version NID
3.60 0xBC42C72F
int ScePervasiveForDriver_BC42C72F_dsi_clock_enable(int bus, int value);


Version NID
3.60 0xDFD96BFC

Turns on the clock (|= mask) of the device (SPI) at offset 0x104 + 4 * device with mask = 1.

int ScePervasiveForDriver_DFD96BFC(int device);


Version NID
3.60 0xE3FC1C8D
int ScePervasiveForDriver_E3FC1C8D_dsi_reset_enter(int bus, int value);


Version NID
3.60 0xE4B145AE

Puts the device (SPI) at offset 0x104 + 4 * device out of reset (&= ~mask) with mask = 1.

int ScePervasiveForDriver_E4B145AE(int device);


Version NID
3.60 0xEB176898

Turns off the clock (&= ~mask) of the device (GPIO) at offset 0x100 with mask = 1.

int ScePervasiveForDriver_EB176898(void);


Version NID
3.60 0xEFD084D8

Turns on the clock (|= mask) of the device (UART) at offset 0x120 + 4 * device with mask = 1.

int ScePervasiveForDriver_EFD084D8(int uart_bus);


Version NID
3.60 0xFFB43AC2
int ScePervasiveForDriver_FFB43AC2_dsi_reset_exit(int bus, int value);


If bus is 0, the SceGpio0Reg registers are used, and if bus is 1, the SceGpio1Reg registers are used.


Version NID
3.60 0x010DC295
int ksceGpioQueryIntr(int bus, int port);


Version NID
3.60 0x372022A4
int ksceGpioSetPortMode(int bus, int port, int mode);


Version NID
3.60 0xBBEA1DDC
int ksceGpioSetIntrMode(int bus, int intr, int mode);


Version NID
3.60 0xD454A584
int ksceGpioPortSet(int bus, int port);


Version NID
3.60 0xF6310435
int ksceGpioPortClear(int bus, int port);


Version NID
3.60 0x35AAD77A
int ksceGpioAcquireIntr(int bus, int intr);


         ScePwmForDriver_0374213C: 0x0374213C
         ScePwmForDriver_13161CCC: 0x13161CCC
         ScePwmForDriver_22C17D24: 0x22C17D24
         ScePwmForDriver_514773B1: 0x514773B1
         ScePwmForDriver_99911920: 0x99911920



typedef struct SceI2cDebugHandlers {
	unsigned int size;
	void (*write_start)(int bus, int device, unsigned char *buffer, int size);
	void (*write_error)(int bus, int error, int result);
	void (*read_start)(int bus, int device, unsigned char *buffer, int size);
	void (*read_error)(int bus, int error, int result);
	void (*write_read_start)(int bus, int write_device, unsigned char *write_buffer, int write_size);
	void (*write_read_error)(int bus, int error, int result);
} SceI2cDebugHandlers;
Version NID Name
3.60 0x0A40B7BF int sceI2cTransferWriteRead(int bus, unsigned int write_dev_id, const void *write_buffer, int write_size, unsigned int read_dev_id, void *read_buffer, int read_size);
3.60 0x30CF9469
3.60 0x76D277AB sceI2cReset(int bus);
3.60 0x9CF8F3D6 sceI2cInit(int bus);
3.60 0xA2C7CE62 int sceI2cSetDebugHandlers(int bus, SceI2cDebugHandlers *debug_handlers)
3.60 0xCA94A759 int sceI2cTransferWrite(int bus, unsigned int device_address, const void *buffer, unsigned int size);
3.60 0xD1D0A9A4 int sceI2cTransferRead(int bus, unsigned int device_address, void *buffer, unsigned int size);
3.60 0xE449AC6E


         SceGrabForDriver_072B8D93: 0x072B8D93
         SceGrabForDriver_188BBCC8: 0x188BBCC8
         SceGrabForDriver_1F292554: 0x1F292554
         SceGrabForDriver_379130B2: 0x379130B2
         SceGrabForDriver_5F36ABC4: 0x5F36ABC4
         SceGrabForDriver_B22EE8BC: 0xB22EE8BC
         SceGrabForDriver_E9C25A28: 0xE9C25A28
         SceGrabForDriver_F13C63DD: 0xF13C63DD


         SceCdramForDriver_0657FC1B: 0x0657FC1B
         SceCdramForDriver_2D728EBF: 0x2D728EBF
         SceCdramForDriver_3EFA7540: 0x3EFA7540



Version NID
3.60 0x114D1413
int ksceDsiDisableHead(int head);


Version NID
3.60 0x3FB0DF1F
int ksceDsiDcsRead(int head, unsigned short param, void *buff, unsigned int size);

MIPI DSI DCS Read (0x06)


Version NID
3.60 0x4DF9E924
int ksceDsiGetPixelClock(int head);


Version NID
3.60 0x5BE5AA9B
int ksceDsiEnableHead(int head);


Version NID
3.60 0x6F8029A1
int SceDsiForDriver_6F8029A1(int head);

Returns the current Vcount, read from ((*(u32 *)(SceDsiReg + 0x4C) >> 16) & 0x1FFF) - 1.


Version NID
3.60 0x7640F607
int ksceDsiSendBlankingPacket(int head);


Version NID
3.60 0x78E6E3CF
int ksceDsiSetLanesAndPixelSize(int head, int lanes, int pixelsize);

For head == 0 (OLED/LCD), lanes must be 2 and pixelsize 24.

For head == 1 (HDMI), lanes can be 2 or 3 and pixelsize can be 24 or 30.


Version NID
3.60 0x8610B795
int SceDsiForDriver_8610B795(int head, int mul, int div);

Sets internal struct member struct[head].unk1C = mul * struct[head].unk18 / div.


Version NID
3.60 0x89C00D2F
int int ksceDsiGenericShortWrite(int head, int param0, int param1, int param2);

Performs a MIPI DSI Generic Short Write, no parameters (0x03), MIPI DSI Generic Short Write, 1 parameter (0x13) or MIPI DSI Generic Short Write, 2 parameters (0x23) depending on the whether parami is negative or not (bit 31 set).


Version NID
3.60 0x97BFEA76
int ksceDsiSetVic(int head, int vic);


Version NID
3.60 0x98120684
int ksceDsiGenericReadRequest(int head, int param, void *buff, unsigned int size);

Performs a MIPI DSI Generic Read Request, no parameters (0x04), or MIPI DSI Generic Read Request, 1 parameter (0x14) depending on the whether param is negative or not (bit 31 set).


Version NID
3.60 0xB3A70C05
int ksceDsiGetVicResolution(int vic, int *width, int *height);


Version NID
3.60 0xBA6BC89F
int ksceDsiDcsShortWrite(int head, unsigned short param0, int param1);

If param1 is negative (bit 31 set), MIPI DSI DCS Short Write, no parameters (0x05) is performed. MIPI DSI DCS Short Write, 1 parameter (0x15) is performed otherwise.


Version NID
3.60 0xC2E85919
int SceDsiForDriver_C2E85919(int head, unsigned int control);


Version NID
3.60 0xF2921E29
int SceDsiForDriver_F2921E29(int head, unsigned int unk);


typedef struct SceIftuFrameBuf {
	unsigned int pixelformat;
	unsigned int width; /* Aligned to 16 */
	unsigned int height; /* Aligned to 8 */
	unsigned int leftover_stride; /* (pitch - aligned_w) * bpp */
	unsigned int leftover_align; /* if YCbCr: (width >> 1) & 0xF [chroma align?] */
	unsigned int paddr0;
	unsigned int paddr1;
	unsigned int paddr2;
} SceIftuFrameBuf; /* size = 0x20 */

typedef struct SceIftuPlaneState {
	SceIftuFrameBuf fb;
	unsigned int unk20; // always 0?
	unsigned int src_x; // in (0x10000 / 960) multiples
	unsigned int src_y; // in (0x10000 / 544) multiples
	unsigned int src_w; // in (0x10000 / 960) multiples
	unsigned int src_h; // in (0x10000 / 544) multiples
	unsigned int dst_x;
	unsigned int dst_y;
	unsigned int dst_w;
	unsigned int dst_h;
	unsigned int vtop_padding;
	unsigned int vbot_padding; /* h - aligned_h */
	unsigned int hleft_padding;
	unsigned int hright_padding; /* w - aligned_w */
} SceIftuPlaneState; /* size = 0x54 */

typedef struct SceIftuCscParams {
	unsigned int post_add_0; /* 10-bit integer */
	unsigned int post_add_1_2; /* 10-bit integer */
	unsigned int post_clamp_max_0; /* 10-bit integer */
	unsigned int post_clamp_min_0; /* 10-bit integer */
	unsigned int post_clamp_max_1_2; /* 10-bit integer */
	unsigned int post_clamp_min_1_2; /* 10-bit integer */
	unsigned int ctm[3][3]; /* S3.9 fixed point format */
} SceIftuCscParams; /* size = 0x3C */

typedef struct SceIftuConvParams {
	unsigned int size;
	unsigned int unk04;
	SceIftuCscParams *csc_params1; // +0x08
	SceIftuCscParams *csc_params2; // +0x0C
	unsigned int csc_control; // +0x10
	unsigned int unk14;
	unsigned int unk18;
	unsigned int unk1C;
	unsigned int alpha;
	unsigned int unk24;
} SceIftuConvParams; /* size = 0x28 */


Version NID
3.60 0x0D7C02F7
int SceIftuForDriver_0D7C02F7_plane_enable(unsigned int plane);


Version NID
3.60 0x0FCBF457

Set plane CSC (Color Space Conversion) information.

int SceIftuForDriver_0FCBF457_set_plane_csc2(unsigned int plane, SceIftuCscParams *param);


Version NID
3.60 0x357EAE24

Sets plane alpha value. Only planes 1 and 3 support alpha blending. Supported alpha values are 0-0x100 where 0x100 is no transparency (alpha blending disable).

int SceIftuForDriver_357EAE24_set_plane_alpha(unsigned int plane, int alpha);


Version NID
3.60 0x7CE0C4DA

Setups a plane or fb?

int SceIftuForDriver_7CE0C4DA_setup_plane(unsigned int index, SceIftuPlaneState *plane_state, int flags, int sync);


Version NID
3.60 0x67E37EFC

Performs colorspace conversion (by using SceIftu2Reg).

int sceIftuCscForDriver(SceIftuFrameBuf *dst_fb, SceIftuPlaneState *src_plane_state, SceIftuConvParams *conv_params);


Version NID
3.60 0xAF19FD85
int SceIftuForDriver_AF19FD85_set_global_blending_control(unsigned int plane, int control);


Version NID
3.60 0xC11F30B3
int SceIftuForDriver_C11F30B3_plane_disable(unsigned int plane);


Version NID
3.60 0xD64F4C6B

Set plane CSC (Color Space Conversion) information.

int SceIftuForDriver_D64F4C6B_set_plane_csc(unsigned int plane, SceIftuCscParams *param);


Version NID
3.60 0xE6EE2C6B

Set plane SRC_WIDTH and SRC_HEIGHT values (in fixed point 16.16).

int SceIftuForDriver_E6EE2C6B_set_plane_size(unsigned int plane, int src_width_hi, unsigned int src_height_hi, int src_width_lo, int src_height_lo);


         SceCsiForDriver_10545393: 0x10545393
         SceCsiForDriver_2AFEA1B0: 0x2AFEA1B0
         SceCsiForDriver_4AE39F26: 0x4AE39F26
         SceCsiForDriver_A1D1805D: 0xA1D1805D
         SceCsiForDriver_B508822B: 0xB508822B
         SceCsiForDriver_FC165297: 0xFC165297